ARM: dts: dra7x-evm: switch to new cpsw switch drv
authorGrygorii Strashko <grygorii.strashko@ti.com>
Mon, 7 Sep 2020 20:21:23 +0000 (23:21 +0300)
committerTony Lindgren <tony@atomide.com>
Thu, 10 Sep 2020 09:51:22 +0000 (12:51 +0300)
Switch all TI DRA7x boards to use new cpsw switch driver. Those boards
configured in dual_mac mode by default. Hence, dual_mac mode has been
preserved the same way between legacy and new driver it's safe to switch
drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/dra7-evm.dts
arch/arm/boot/dts/dra71-evm.dts
arch/arm/boot/dts/dra72-evm-common.dtsi
arch/arm/boot/dts/dra72-evm-revc.dts
arch/arm/boot/dts/dra72-evm.dts
arch/arm/boot/dts/dra76-evm.dts

index bda6f7e..38530db 100644 (file)
        ti,no-idle-on-init;
 };
 
-&mac {
+&mac_sw {
        status = "okay";
-       dual_emac;
 };
 
-&cpsw_emac0 {
+&cpsw_port1 {
        phy-handle = <&ethphy0>;
        phy-mode = "rgmii";
-       dual_emac_res_vlan = <1>;
+       ti,dual-emac-pvid = <1>;
 };
 
-&cpsw_emac1 {
+&cpsw_port2 {
        phy-handle = <&ethphy1>;
        phy-mode = "rgmii";
-       dual_emac_res_vlan = <2>;
+       ti,dual-emac-pvid = <2>;
 };
 
-&davinci_mdio {
+&davinci_mdio_sw {
        ethphy0: ethernet-phy@2 {
                reg = <2>;
        };
index 10da51b..cad58f7 100644 (file)
        vqmmc-supply = <&evm_1v8_sw>;
 };
 
-&mac {
+&mac_sw {
        mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
                     <&pcf_hdmi 9 GPIO_ACTIVE_LOW>,     /* P11 */
                     <&pcf_hdmi 10 GPIO_ACTIVE_LOW>;    /* P12 */
-       dual_emac;
+       status = "okay";
 };
 
-&cpsw_emac0 {
+&cpsw_port1 {
        phy-handle = <&dp83867_0>;
        phy-mode = "rgmii-id";
-       dual_emac_res_vlan = <1>;
+       ti,dual-emac-pvid = <1>;
 };
 
-&cpsw_emac1 {
+&cpsw_port2 {
        phy-handle = <&dp83867_1>;
        phy-mode = "rgmii-id";
-       dual_emac_res_vlan = <2>;
+       ti,dual-emac-pvid = <2>;
 };
 
-&davinci_mdio {
+&davinci_mdio_sw {
        dp83867_0: ethernet-phy@2 {
                reg = <2>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
index 7506e41..b65b2dd 100644 (file)
        };
 };
 
-&mac {
-       status = "okay";
-};
-
 &dcan1 {
        status = "okay";
        pinctrl-names = "default", "sleep", "active";
index 54dab0f..f242b93 100644 (file)
        interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
 };
 
-&mac {
+&mac_sw {
        mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
                     <&pcf_hdmi 9 GPIO_ACTIVE_LOW>,     /* P11 */
                     <&pcf_hdmi 10 GPIO_ACTIVE_LOW>;    /* P12 */
-       dual_emac;
+       status = "okay";
 };
 
-&cpsw_emac0 {
+&cpsw_port1 {
        phy-handle = <&dp83867_0>;
        phy-mode = "rgmii-id";
-       dual_emac_res_vlan = <1>;
+       ti,dual-emac-pvid = <1>;
 };
 
-&cpsw_emac1 {
+&cpsw_port2 {
        phy-handle = <&dp83867_1>;
        phy-mode = "rgmii-id";
-       dual_emac_res_vlan = <2>;
+       ti,dual-emac-pvid = <2>;
 };
 
-&davinci_mdio {
+&davinci_mdio_sw {
        dp83867_0: ethernet-phy@2 {
                reg = <2>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
index 6ea9936..5f62f92 100644 (file)
        interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 };
 
-&mac {
-       slaves = <1>;
+&mac_sw {
        mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
+       status = "okay";
 };
 
-&cpsw_emac0 {
+&cpsw_port1 {
        phy-handle = <&ethphy0>;
        phy-mode = "rgmii";
+       ti,dual-emac-pvid = <1>;
+};
+
+&cpsw_port2 {
+       status = "disabled";
 };
 
-&davinci_mdio {
+&davinci_mdio_sw {
        ethphy0: ethernet-phy@3 {
                reg = <3>;
        };
index 81590ef..9bd01ae 100644 (file)
        status = "disabled";
 };
 
-&mac {
+&mac_sw {
        status = "okay";
-
-       dual_emac;
 };
 
-&cpsw_emac0 {
+&cpsw_port1 {
        phy-handle = <&dp83867_0>;
        phy-mode = "rgmii-id";
-       dual_emac_res_vlan = <1>;
+       ti,dual-emac-pvid = <1>;
 };
 
-&cpsw_emac1 {
+&cpsw_port2 {
        phy-handle = <&dp83867_1>;
        phy-mode = "rgmii-id";
-       dual_emac_res_vlan = <2>;
+       ti,dual-emac-pvid = <2>;
 };
 
-&davinci_mdio {
+&davinci_mdio_sw {
        dp83867_0: ethernet-phy@2 {
                reg = <2>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;