select MULTI_IRQ_HANDLER
select NEED_MACH_MEMORY_H
select NO_IOPORT
- select PINCTRL
+ select PINCTRL if ARCH_WANT_OPTIONAL_GPIOLIB
select PM_GENERIC_DOMAINS if PM
select SPARSE_IRQ
help
default 8
config IWMMXT
- bool "Enable iWMMXt support"
+ bool "Enable iWMMXt support" if !CPU_PJ4
depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
- default y if PXA27x || PXA3xx || ARCH_MMP
+ default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
help
Enable support for iWMMXt context switching at run time if
running on a CPU that supports it.
to deadlock. This workaround puts DSB before executing ISB if
an abort may occur on cache maintenance.
+ config ARM_ERRATA_798181
+ bool "ARM errata: TLBI/DSB failure on Cortex-A15"
+ depends on CPU_V7 && SMP
+ help
+ On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
+ adequately shooting down all use of the old entries. This
+ option enables the Linux kernel workaround for this erratum
+ which sends an IPI to the CPUs that are running the same ASID
+ as the one being invalidated.
+
endmenu
source "arch/arm/common/Kconfig"
config HAVE_ARM_TWD
bool
depends on SMP
+ select CLKSRC_OF if OF
help
This options enables support for the ARM timer and watchdog unit
source "drivers/cpufreq/Kconfig"
- config CPU_FREQ_IMX
- tristate "CPUfreq driver for i.MX CPUs"
- depends on ARCH_MXC && CPU_FREQ
- select CPU_FREQ_TABLE
- help
- This enables the CPUfreq driver for i.MX CPUs.
-
config CPU_FREQ_SA1100
bool
/*
- * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011-2013 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
#include <linux/clk.h>
#include <linux/clkdev.h>
+#include <linux/clocksource.h>
#include <linux/cpu.h>
#include <linux/delay.h>
#include <linux/export.h>
#include <linux/regmap.h>
#include <linux/micrel_phy.h>
#include <linux/mfd/syscon.h>
-#include <asm/smp_twd.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <asm/mach/time.h>
#include <asm/system_misc.h>
#include "common.h"
#include "cpuidle.h"
#include "hardware.h"
- #define IMX6Q_ANALOG_DIGPROG 0x260
+ static u32 chip_revision;
- static int imx6q_revision(void)
+ int imx6q_revision(void)
{
- struct device_node *np;
- void __iomem *base;
- static u32 rev;
-
- if (!rev) {
- np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
- if (!np)
- return IMX_CHIP_REVISION_UNKNOWN;
- base = of_iomap(np, 0);
- if (!base) {
- of_node_put(np);
- return IMX_CHIP_REVISION_UNKNOWN;
- }
- rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
- iounmap(base);
- of_node_put(np);
- }
+ return chip_revision;
+ }
+
+ static void __init imx6q_init_revision(void)
+ {
+ u32 rev = imx_anatop_get_digprog();
switch (rev & 0xff) {
case 0:
- return IMX_CHIP_REVISION_1_0;
+ chip_revision = IMX_CHIP_REVISION_1_0;
+ break;
case 1:
- return IMX_CHIP_REVISION_1_1;
+ chip_revision = IMX_CHIP_REVISION_1_1;
+ break;
case 2:
- return IMX_CHIP_REVISION_1_2;
+ chip_revision = IMX_CHIP_REVISION_1_2;
+ break;
default:
- return IMX_CHIP_REVISION_UNKNOWN;
+ chip_revision = IMX_CHIP_REVISION_UNKNOWN;
}
+
+ mxc_set_cpu_type(rev >> 16 & 0xff);
}
void imx6q_restart(char mode, const char *cmd)
}
static void __init imx6q_usb_init(void)
{
- struct regmap *anatop;
-
- #define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
- #define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
-
- #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
- #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
-
- anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
- if (!IS_ERR(anatop)) {
- /*
- * The external charger detector needs to be disabled,
- * or the signal at DP will be poor
- */
- regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
- BM_ANADIG_USB_CHRG_DETECT_EN_B
- | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
- regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
- BM_ANADIG_USB_CHRG_DETECT_EN_B |
- BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
- } else {
- pr_warn("failed to find fsl,imx6q-anatop regmap\n");
- }
+ imx_anatop_usb_chrg_detect_disable();
}
static void __init imx6q_init_machine(void)
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ imx_anatop_init();
imx6q_pm_init();
imx6q_usb_init();
imx6q_1588_init();
static void __init imx6q_init_irq(void)
{
+ imx6q_init_revision();
l2x0_of_init(0, ~0UL);
imx_src_init();
imx_gpc_init();
static void __init imx6q_timer_init(void)
{
mx6q_clocks_init();
- twd_local_timer_of_register();
+ clocksource_of_init();
- imx_print_silicon_rev("i.MX6Q", imx6q_revision());
+ imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
+ imx6q_revision());
}
static const char *imx6q_dt_compat[] __initdata = {
+ "fsl,imx6dl",
"fsl,imx6q",
NULL,
};
- DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
+ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad/DualLite (Device Tree)")
.smp = smp_ops(imx_smp_ops),
.map_io = imx6q_map_io,
.init_irq = imx6q_init_irq,
#include <linux/init.h>
#include <linux/smp.h>
-#include <linux/irqchip/arm-gic.h>
#include <asm/page.h>
#include <asm/smp_scu.h>
#include <asm/mach/map.h>
writel_relaxed(val, scu_base);
}
-static void __cpuinit imx_secondary_init(unsigned int cpu)
-{
- /*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-}
-
static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
imx_set_cpu_jump(cpu, v7_secondary_startup);
ncores = scu_get_core_count(scu_base);
- for (i = 0; i < ncores; i++)
- set_cpu_possible(i, true);
+ for (i = ncores; i < NR_CPUS; i++)
+ set_cpu_possible(i, false);
}
void imx_smp_prepare(void)
struct smp_operations imx_smp_ops __initdata = {
.smp_init_cpus = imx_smp_init_cpus,
.smp_prepare_cpus = imx_smp_prepare_cpus,
- .smp_secondary_init = imx_secondary_init,
.smp_boot_secondary = imx_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_die = imx_cpu_die,
#include <linux/export.h>
#include <linux/types.h>
#include <linux/init.h>
+ #include <linux/reset.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/spinlock.h>
#include <linux/clk.h>
#include <linux/list.h>
#include <linux/irq.h>
+#include <linux/irqchip/chained_irq.h>
#include <linux/of_device.h>
-#include <asm/mach/irq.h>
#include "imx-ipu-v3.h"
#include "ipu-prv.h"
}
EXPORT_SYMBOL_GPL(ipu_idmac_disable_channel);
- static int ipu_reset(struct ipu_soc *ipu)
+ static int ipu_memory_reset(struct ipu_soc *ipu)
{
unsigned long timeout;
if (ret)
goto out_failed_irq;
- ret = ipu_reset(ipu);
+ ret = device_reset(&pdev->dev);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to reset: %d\n", ret);
+ goto out_failed_reset;
+ }
+ ret = ipu_memory_reset(ipu);
if (ret)
goto out_failed_reset;
failed_add_clients:
ipu_submodules_exit(ipu);
failed_submodules_init:
- ipu_irq_exit(ipu);
out_failed_reset:
+ ipu_irq_exit(ipu);
out_failed_irq:
clk_disable_unprepare(ipu->clk);
failed_clk_get:
projects / profile / ivi / kernel-x86-ivi.git / commitdiff