add yuyv->nv12 conversion in image processing

diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
index 8eaccbc..bf8450b 100755 (executable)
--- a/src/i965_drv_video.c
+++ b/src/i965_drv_video.c
@@ -2350,7 +2350,15 @@ VAStatus i965_DeriveImage(VADriverContextP ctx,
         image->pitches[2] = obj_surface->cb_cr_pitch; /* V */
         image->offsets[2] = w_pitch * obj_surface->y_cr_offset;
         break;
-
+    case VA_FOURCC('Y', 'U', 'Y', '2'):
+        image->num_planes = 1;
+        image->pitches[0] = obj_surface->width * 2; /* Y, width is aligned already */
+        image->offsets[0] = 0;
+        image->pitches[1] = obj_surface->width * 2; /* U */
+        image->offsets[1] = 0;
+        image->pitches[2] = obj_surface->width * 2; /* V */
+        image->offsets[2] = 0;
+        break;
     default:
         goto error;
     }

diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index 0109292..66eee83 100755 (executable)
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -99,6 +99,10 @@ static const uint32_t pp_pl3_load_save_pa_gen5[][4] = {
 #include "shaders/post_processing/gen5_6/pl3_load_save_pa.g4b.gen5"
 };
 
+static const uint32_t pp_pa_load_save_nv12_gen5[][4] = {
+#include "shaders/post_processing/gen5_6/pa_load_save_nv12.g4b.gen5"
+};
+
 static VAStatus pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
                                    const struct i965_surface *src_surface,
                                    const VARectangle *src_rect,
@@ -275,6 +279,18 @@ static struct pp_module pp_modules_gen5[] = {
         pp_plx_load_save_plx_initialize,
     },
 
+    {
+        {
+            "PA_NV12 module",
+            PP_PA_LOAD_SAVE_NV12,
+            pp_pa_load_save_nv12_gen5,
+            sizeof(pp_pa_load_save_nv12_gen5),
+            NULL,
+        },
+    
+        pp_plx_load_save_plx_initialize,
+    },
+
 };
 
 static const uint32_t pp_null_gen6[][4] = {
@@ -321,6 +337,10 @@ static const uint32_t pp_pl3_load_save_pa_gen6[][4] = {
 #include "shaders/post_processing/gen5_6/pl3_load_save_pa.g6b"
 };
 
+static const uint32_t pp_pa_load_save_nv12_gen6[][4] = {
+#include "shaders/post_processing/gen5_6/pa_load_save_nv12.g6b"
+};
+
 static struct pp_module pp_modules_gen6[] = {
     {
         {
@@ -453,6 +473,18 @@ static struct pp_module pp_modules_gen6[] = {
         pp_plx_load_save_plx_initialize,
     },
     
+    {
+        {
+            "PA_NV12 module",
+            PP_PA_LOAD_SAVE_NV12,
+            pp_pa_load_save_nv12_gen6,
+            sizeof(pp_pa_load_save_nv12_gen6),
+            NULL,
+        },
+    
+        pp_plx_load_save_plx_initialize,
+    },
+    
 };
 
 static const uint32_t pp_null_gen7[][4] = {
@@ -492,6 +524,8 @@ static const uint32_t pp_nv12_load_save_pa_gen7[][4] = {
 };
 static const uint32_t pp_pl3_load_save_pa_gen7[][4] = {
 };
+static const uint32_t pp_pa_load_save_nv12_gen7[][4] = {
+};
 
 static VAStatus gen7_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
                                            const struct i965_surface *src_surface,
@@ -643,6 +677,18 @@ static struct pp_module pp_modules_gen7[] = {
     
         pp_plx_load_save_plx_initialize,
     },
+
+    {
+        {
+            "PA_NV12 module",
+            PP_PA_LOAD_SAVE_NV12,
+            pp_pa_load_save_nv12_gen7,
+            sizeof(pp_pa_load_save_nv12_gen7),
+            NULL,
+        },
+    
+        pp_plx_load_save_plx_initialize,
+    },
     
 };
 
@@ -3934,6 +3980,35 @@ i965_image_pl2_processing(VADriverContextP ctx,
     return VA_STATUS_SUCCESS;
 }
 
+static VAStatus
+i965_image_pl1_processing(VADriverContextP ctx,
+                          const struct i965_surface *src_surface,
+                          const VARectangle *src_rect,
+                          struct i965_surface *dst_surface,
+                          const VARectangle *dst_rect)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_post_processing_context *pp_context = i965->pp_context;
+    int fourcc = pp_get_surface_fourcc(ctx, dst_surface);
+
+    if (fourcc == VA_FOURCC('N', 'V', '1', '2')) {
+        i965_post_processing_internal(ctx, i965->pp_context,
+                                      src_surface,
+                                      src_rect,
+                                      dst_surface,
+                                      dst_rect,
+                                      PP_PA_LOAD_SAVE_NV12,
+                                      NULL);
+    }
+    else {
+        return VA_STATUS_ERROR_UNKNOWN;
+    }
+
+    intel_batchbuffer_flush(pp_context->batch);
+
+    return VA_STATUS_SUCCESS;
+}
+
 VAStatus
 i965_image_processing(VADriverContextP ctx,
                       const struct i965_surface *src_surface,
@@ -3968,6 +4043,13 @@ i965_image_processing(VADriverContextP ctx,
                                                dst_surface,
                                                dst_rect);
             break;
+        case  VA_FOURCC('Y', 'U', 'Y', '2'):
+            status = i965_image_pl1_processing(ctx,
+                                               src_surface,
+                                               src_rect,
+                                               dst_surface,
+                                               dst_rect);
+            break;
 
         default:
             status = VA_STATUS_ERROR_UNIMPLEMENTED;

diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index 4b8f606..398bd02 100755 (executable)
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -49,9 +49,10 @@ enum
     PP_NV12_DN,
     PP_NV12_LOAD_SAVE_PA,
     PP_PL3_LOAD_SAVE_PA,
+    PP_PA_LOAD_SAVE_NV12,
 };
 
-#define NUM_PP_MODULES                  11
+#define NUM_PP_MODULES                  12
 
 struct i965_post_processing_context;