arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210
authorThierry Reding <treding@nvidia.com>
Thu, 6 Aug 2020 15:42:45 +0000 (17:42 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 27 Aug 2020 15:36:46 +0000 (17:36 +0200)
The PWM on Tegra210 can run at a maximum frequency of 48 MHz and cannot
reach the minimum period is 5334 ns. The currently configured period of
4880 ns is not within the valid range, so set it to 8000 ns. This value
was taken from the downstream DTS files and seems to work fine.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts

index 6a4b50a..85ee7e6 100644 (file)
 
        vdd_gpu: regulator@100 {
                compatible = "pwm-regulator";
-               pwms = <&pwm 1 4880>;
+               pwms = <&pwm 1 8000>;
                regulator-name = "VDD_GPU";
                regulator-min-microvolt = <710000>;
                regulator-max-microvolt = <1320000>;
index 553a558..c55716c 100644 (file)
 
        vdd_gpu: regulator@6 {
                compatible = "pwm-regulator";
-               pwms = <&pwm 1 4880>;
+               pwms = <&pwm 1 8000>;
 
                regulator-name = "VDD_GPU";
                regulator-min-microvolt = <710000>;