drm: Add SDP Error Detection Configuration Register
authorArun R Murthy <arun.r.murthy@intel.com>
Thu, 2 Mar 2023 08:15:31 +0000 (13:45 +0530)
committerJani Nikula <jani.nikula@intel.com>
Tue, 21 Mar 2023 14:16:56 +0000 (16:16 +0200)
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.

v2: Update the macro name to reflect the DP spec(Harry)

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230302081532.765821-2-arun.r.murthy@intel.com
include/drm/display/drm_dp.h

index 632376c..358db4a 100644 (file)
 # define DP_FEC_LANE_2_SELECT              (2 << 4)
 # define DP_FEC_LANE_3_SELECT              (3 << 4)
 
+#define DP_SDP_ERROR_DETECTION_CONFIGURATION   0x121   /* DP 2.0 E11 */
+#define DP_SDP_CRC16_128B132B_EN               BIT(0)
+
 #define DP_AUX_FRAME_SYNC_VALUE                    0x15c   /* eDP 1.4 */
 # define DP_AUX_FRAME_SYNC_VALID           (1 << 0)