In
6572d4e50d73ac60a8974d07de74c27a7f99ebef we moved the
addressTempRegister to r10, and in
d8b276a59402cbbe6d070ba38805350e7f3dd8a1 we made sure that the YarrJIT
saves it too. JSC solved this by moving it to r6, which is already
saved by the YarrJIT. To make a future update of the assembler easier,
we also move it to r6.
This requires that we move our scratch register too. But, because it is
used a lot, we don't want it above r7 for Thumb2 reasons. Therefore, we
move the engine to r10, and the scratch register to r5.
Change-Id: I35be539940d9fe80971973cfa7f3a8dab2196a1e
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>
r0 = 0,
r1,
r2,
- r3, S0 = r3, /* Same as thumb assembler. */
+ r3,
r4,
r5,
- r6,
+ r6, S0 = r6,
r7,
r8,
r9,
// - dTR is likely used more than aTR, and we'll get better instruction
// encoding if it's in the low 8 registers.
static const RegisterID dataTempRegister = ARMRegisters::ip;
- static const RegisterID addressTempRegister = ARMRegisters::r10;
+ static const RegisterID addressTempRegister = ARMRegisters::r6;
static const ARMRegisters::FPDoubleRegisterID fpTempRegister = ARMRegisters::d7;
inline ARMRegisters::FPSingleRegisterID fpTempRegisterAsSingle() { return ARMRegisters::asSingle(fpTempRegister); }
static const RegisterID input = ARMRegisters::r0;
static const RegisterID index = ARMRegisters::r1;
static const RegisterID length = ARMRegisters::r2;
- static const RegisterID output = ARMRegisters::r4;
+ static const RegisterID output = ARMRegisters::r3;
- static const RegisterID regT0 = ARMRegisters::r5;
- static const RegisterID regT1 = ARMRegisters::r6;
+ static const RegisterID regT0 = ARMRegisters::r4;
+ static const RegisterID regT1 = ARMRegisters::r5;
static const RegisterID returnRegister = ARMRegisters::r0;
static const RegisterID returnRegister2 = ARMRegisters::r1;
#if CPU(ARM_TRADITIONAL)
push(ARMRegisters::r8); // scratch register
#endif
- push(addressTempRegister);
if (compileMode == IncludeSubpatterns)
move(ARMRegisters::r3, output);
#elif CPU(SH4)
pop(X86Registers::ebx);
pop(X86Registers::ebp);
#elif CPU(ARM)
- pop(addressTempRegister);
#if CPU(ARM_TRADITIONAL)
pop(ARMRegisters::r8); // scratch register
#endif
static const JSC::MacroAssembler::RegisterID LocalsRegister = JSC::ARMRegisters::r7;
#endif
static const JSC::MacroAssembler::RegisterID StackPointerRegister = JSC::ARMRegisters::r13;
- static const JSC::MacroAssembler::RegisterID ScratchRegister = JSC::ARMRegisters::r6;
- static const JSC::MacroAssembler::RegisterID EngineRegister = JSC::ARMRegisters::r5;
+ static const JSC::MacroAssembler::RegisterID ScratchRegister = JSC::ARMRegisters::r5;
+ static const JSC::MacroAssembler::RegisterID EngineRegister = JSC::ARMRegisters::r10;
static const JSC::MacroAssembler::RegisterID ReturnValueRegister = JSC::ARMRegisters::r0;
static const JSC::MacroAssembler::FPRegisterID FPGpr0 = JSC::ARMRegisters::d0;
static const JSC::MacroAssembler::FPRegisterID FPGpr1 = JSC::ARMRegisters::d1;