arm: Remove secomx6quq7 board
authorTom Rini <trini@konsulko.com>
Sun, 21 Feb 2021 01:05:48 +0000 (20:05 -0500)
committerTom Rini <trini@konsulko.com>
Sat, 10 Apr 2021 12:00:45 +0000 (08:00 -0400)
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
arch/arm/mach-imx/mx6/Kconfig
board/seco/Kconfig [deleted file]
board/seco/common/Makefile [deleted file]
board/seco/common/mx6.c [deleted file]
board/seco/common/mx6.h [deleted file]
board/seco/mx6quq7/MAINTAINERS [deleted file]
board/seco/mx6quq7/Makefile [deleted file]
board/seco/mx6quq7/mx6quq7-2g.cfg [deleted file]
board/seco/mx6quq7/mx6quq7.c [deleted file]
configs/secomx6quq7_defconfig [deleted file]
include/configs/secomx6quq7.h [deleted file]

index e5e1ce3..cd71560 100644 (file)
@@ -540,9 +540,6 @@ config TARGET_PCL063_ULL
        select DM_THERMAL
        select SUPPORT_SPL
 
-config TARGET_SECOMX6
-       bool "secomx6 boards"
-
 config TARGET_SOMLABS_VISIONSOM_6ULL
        bool "visionsom-6ull"
        depends on MX6ULL
@@ -718,7 +715,6 @@ source "board/softing/vining_2000/Kconfig"
 source "board/liebherr/display5/Kconfig"
 source "board/liebherr/mccmon6/Kconfig"
 source "board/logicpd/imx6/Kconfig"
-source "board/seco/Kconfig"
 source "board/solidrun/mx6cuboxi/Kconfig"
 source "board/somlabs/visionsom-6ull/Kconfig"
 source "board/technexion/pico-imx6/Kconfig"
diff --git a/board/seco/Kconfig b/board/seco/Kconfig
deleted file mode 100644 (file)
index 12dd965..0000000
+++ /dev/null
@@ -1,65 +0,0 @@
-if TARGET_SECOMX6
-
-choice
-       prompt "SECO i.MX6 Board variant"
-       optional
-
-config SECOMX6_Q7
-       bool "Q7"
-
-config SECOMX6_UQ7
-       bool "uQ7"
-
-config SECOMX6_USBC
-       bool "uSBC"
-
-endchoice
-
-choice
-       prompt "SECO i.MX6 SoC variant"
-       optional
-
-config SECOMX6Q
-       bool "i.MX6Q"
-       depends on MX6Q
-
-config SECOMX6DL
-       bool "i.MX6DL"
-       depends on MX6DL
-
-config SECOMX6S
-       bool "i.MX6S"
-       depends on MX6S
-
-endchoice
-
-choice
-       prompt "DDR size"
-
-config SECOMX6_512MB
-       bool "512MB"
-
-config SECOMX6_1GB
-       bool "1GB"
-
-config SECOMX6_2GB
-       bool "2GB"
-
-config SECOMX6_4GB
-       bool "4GB"
-
-endchoice
-
-config IMX_CONFIG
-       default "board/seco/mx6quq7/mx6quq7-2g.cfg" if SECOMX6_UQ7 && SECOMX6Q && SECOMX6_2GB
-
-config SYS_BOARD
-       default "mx6quq7" if SECOMX6_UQ7 && SECOMX6Q
-
-config SYS_VENDOR
-       default "seco"
-
-config SYS_CONFIG_NAME
-       default "secomx6quq7" if SECOMX6_UQ7 && SECOMX6Q
-
-endif
diff --git a/board/seco/common/Makefile b/board/seco/common/Makefile
deleted file mode 100644 (file)
index 4220e89..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-$(CONFIG_TARGET_SECOMX6) += mx6.o
diff --git a/board/seco/common/mx6.c b/board/seco/common/mx6.c
deleted file mode 100644 (file)
index 51832b9..0000000
+++ /dev/null
@@ -1,137 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2013 Freescale Semiconductor, Inc.
- * Copyright (C) 2015 ECA Sinters
- *
- * Author: Fabio Estevam <fabio.estevam@freescale.com>
- * Modified by: Boris Brezillon <boris.brezillon@free-electrons.com>
- */
-
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <asm/arch/mxc_hdmi.h>
-#include <asm/arch/crm_regs.h>
-#include <linux/fb.h>
-#include <ipu_pixfmt.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-#include <micrel.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <i2c.h>
-
-#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |                  \
-       PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |                 \
-       PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-static iomux_v3_cfg_t const uart2_pads[] = {
-       MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-       MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-void seco_mx6_setup_uart_iomux(void)
-{
-       imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
-}
-
-#define ENET_PAD_CTRL  (PAD_CTL_PUS_47K_UP |   \
-                        PAD_CTL_SPEED_MED |    \
-                        PAD_CTL_DSE_40ohm |    \
-                        PAD_CTL_HYS)
-
-static iomux_v3_cfg_t const enet_pads[] = {
-       MX6_PAD_ENET_MDIO__ENET_MDIO            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_ENET_MDC__ENET_MDC              | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_TXC__RGMII_TXC            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_TD0__RGMII_TD0            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_TD1__RGMII_TD1            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_TD2__RGMII_TD2            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_TD3__RGMII_TD3            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_ENET_REF_CLK__ENET_TX_CLK       | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_RXC__RGMII_RXC            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_RD0__RGMII_RD0            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_RD1__RGMII_RD1            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_RD2__RGMII_RD2            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_RD3__RGMII_RD3            | MUX_PAD_CTRL(ENET_PAD_CTRL),
-       MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL),
-};
-
-void seco_mx6_setup_enet_iomux(void)
-{
-       imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
-}
-
-int seco_mx6_rgmii_rework(struct phy_device *phydev)
-{
-       /* control data pad skew - devaddr = 0x02, register = 0x04 */
-       ksz9031_phy_extended_write(phydev, 0x02,
-                                  MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
-                                  MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
-       /* rx data pad skew - devaddr = 0x02, register = 0x05 */
-       ksz9031_phy_extended_write(phydev, 0x02,
-                                  MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
-                                  MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
-       /* tx data pad skew - devaddr = 0x02, register = 0x05 */
-       ksz9031_phy_extended_write(phydev, 0x02,
-                                  MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
-                                  MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
-
-       /* gtx and rx clock pad skew - devaddr = 0x02, register = 0x08 */
-       ksz9031_phy_extended_write(phydev, 0x02,
-                                  MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
-                                  MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF);
-       return 0;
-}
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP |   \
-                       PAD_CTL_SPEED_LOW |     \
-                       PAD_CTL_DSE_80ohm |     \
-                       PAD_CTL_SRE_FAST  |     \
-                       PAD_CTL_HYS)
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
-       MX6_PAD_SD3_CLK__SD3_CLK        | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_CMD__SD3_CMD        | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT0__SD3_DATA0     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT1__SD3_DATA1     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT2__SD3_DATA2     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT3__SD3_DATA3     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usdhc4_pads[] = {
-       MX6_PAD_SD4_CLK__SD4_CLK        | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_CMD__SD4_CMD        | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT0__SD4_DATA0     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT1__SD4_DATA1     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT2__SD4_DATA2     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT3__SD4_DATA3     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-void seco_mx6_setup_usdhc_iomux(int id)
-{
-       switch (id) {
-       case 3:
-               imx_iomux_v3_setup_multiple_pads(usdhc3_pads,
-                                                ARRAY_SIZE(usdhc3_pads));
-               break;
-
-       case 4:
-               imx_iomux_v3_setup_multiple_pads(usdhc4_pads,
-                                                ARRAY_SIZE(usdhc4_pads));
-               break;
-
-       default:
-               printf("Warning: invalid usdhc id (%d)\n", id);
-               break;
-       }
-}
diff --git a/board/seco/common/mx6.h b/board/seco/common/mx6.h
deleted file mode 100644 (file)
index a05db67..0000000
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __SECO_COMMON_MX6_H
-#define __SECO_COMMON_MX6_H
-
-void seco_mx6_setup_uart_iomux(void);
-void seco_mx6_setup_enet_iomux(void);
-int seco_mx6_rgmii_rework(struct phy_device *phydev);
-void seco_mx6_setup_usdhc_iomux(int id);
-
-#endif /* __SECO_COMMON_MX6_H */
diff --git a/board/seco/mx6quq7/MAINTAINERS b/board/seco/mx6quq7/MAINTAINERS
deleted file mode 100644 (file)
index 60fd4ca..0000000
+++ /dev/null
@@ -1,6 +0,0 @@
-MX6QUQ7 BOARD
-M:     Boris Brezillon <boris.brezillon@free-electrons.com>
-S:     Maintained
-F:     board/seco/mx6quq7/
-F:     include/configs/secomx6quq7.h
-F:     configs/secomx6quq7_defconfig
diff --git a/board/seco/mx6quq7/Makefile b/board/seco/mx6quq7/Makefile
deleted file mode 100644 (file)
index c7aea8c..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2015 ECA Sinters
-
-obj-y  := mx6quq7.o
diff --git a/board/seco/mx6quq7/mx6quq7-2g.cfg b/board/seco/mx6quq7/mx6quq7-2g.cfg
deleted file mode 100644 (file)
index 68d13cc..0000000
+++ /dev/null
@@ -1,172 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2013 Seco USA Inc
- *
- * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/* image version */
-IMAGE_VERSION  2
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-BOOT_FROM      sd
-
-#define __ASSEMBLY__
-#include <config.h>
-#include "asm/arch/mx6-ddr.h"
-#include "asm/arch/iomux.h"
-#include "asm/arch/crm_regs.h"
-
-/* DDR IO TYPE */
-DATA 4, MX6_IOM_GRP_DDRPKE,    0x00000000
-DATA 4, MX6_IOM_GRP_DDR_TYPE,  0x000C0000
-
-/* DATA STROBE */
-DATA 4, MX6_IOM_DDRMODE_CTL,   0x00020000
-DATA 4, MX6_IOM_DRAM_SDQS0,    0x00000028
-DATA 4, MX6_IOM_DRAM_SDQS1,    0x00000028
-DATA 4, MX6_IOM_DRAM_SDQS2,    0x00000028
-DATA 4, MX6_IOM_DRAM_SDQS3,    0x00000028
-DATA 4, MX6_IOM_DRAM_SDQS4,    0x00000028
-DATA 4, MX6_IOM_DRAM_SDQS5,    0x00000028
-DATA 4, MX6_IOM_DRAM_SDQS6,    0x00000028
-DATA 4, MX6_IOM_DRAM_SDQS7,    0x00000028
-
-/* DATA */
-DATA 4, MX6_IOM_GRP_DDRMODE,    0x00020000
-DATA 4, MX6_IOM_GRP_B0DS,      0x00000028
-DATA 4, MX6_IOM_GRP_B1DS,      0x00000028
-DATA 4, MX6_IOM_GRP_B2DS,      0x00000028
-DATA 4, MX6_IOM_GRP_B3DS,      0x00000028
-DATA 4, MX6_IOM_GRP_B4DS,      0x00000028
-DATA 4, MX6_IOM_GRP_B5DS,      0x00000028
-DATA 4, MX6_IOM_GRP_B6DS,      0x00000028
-DATA 4, MX6_IOM_GRP_B7DS,      0x00000028
-DATA 4, MX6_IOM_DRAM_DQM0,      0x00000028
-DATA 4, MX6_IOM_DRAM_DQM1,      0x00000028
-DATA 4, MX6_IOM_DRAM_DQM2,      0x00000028
-DATA 4, MX6_IOM_DRAM_DQM3,      0x00000028
-DATA 4, MX6_IOM_DRAM_DQM4,      0x00000028
-DATA 4, MX6_IOM_DRAM_DQM5,      0x00000028
-DATA 4, MX6_IOM_DRAM_DQM6,      0x00000028
-DATA 4, MX6_IOM_DRAM_DQM7,      0x00000028
-/* ADDRESS */
-DATA 4, MX6_IOM_GRP_ADDDS,     0x00000028
-DATA 4, MX6_IOM_DRAM_CAS,       0x00000028
-DATA 4, MX6_IOM_DRAM_RAS,       0x00000028
-
-/* CONTROL */
-DATA 4, MX6_IOM_GRP_CTLDS,     0x00000030
-DATA 4, MX6_IOM_DRAM_RESET,     0x00000028
-DATA 4, MX6_IOM_DRAM_SDBA2,     0x00000000
-DATA 4, MX6_IOM_DRAM_SDODT0,    0x00000028
-DATA 4, MX6_IOM_DRAM_SDODT1,    0x00000028
-
-/* CLOCK */
-DATA 4, MX6_IOM_DRAM_SDCLK_0,  0x00000028
-DATA 4, MX6_IOM_DRAM_SDCLK_1,  0x00000028
-
-/*
- * DDR3 SETTINGS
- * Read Data Bit Delay
- */
-DATA 4, MX6_MMDC_P0_MPRDDQBY0DL,       0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY1DL,       0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY2DL,       0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY3DL,       0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY0DL,       0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY1DL,       0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY2DL,       0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY3DL,       0x33333333
-
-
-/* Write Leveling */
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0,        0x001F001F
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1,        0x001F001F
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0,        0x001F0001
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1,        0x001F001F
-
-/* DQS gating, read delay, write delay calibration values */
-DATA 4, MX6_MMDC_P0_MPDGCTRL0,  0x431A0326
-DATA 4, MX6_MMDC_P0_MPDGCTRL1,  0x0323031B
-DATA 4, MX6_MMDC_P1_MPDGCTRL0,  0x433F0340
-DATA 4, MX6_MMDC_P1_MPDGCTRL1,  0x0345031C
-
-/* Read calibration */
-DATA 4, MX6_MMDC_P0_MPRDDLCTL,  0x40343137
-DATA 4, MX6_MMDC_P1_MPRDDLCTL,  0x40372F45
-
-/* write calibration */
-DATA 4, MX6_MMDC_P0_MPWRDLCTL,  0x32414741
-DATA 4, MX6_MMDC_P1_MPWRDLCTL,  0x4731473C
-
-/* Complete calibration by forced measurement: */
-DATA 4, MX6_MMDC_P0_MPMUR0,     0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0,     0x00000800
-
-/*
- * MMDC init:
- * in DDR3, 64-bit mode, only MMDC0 is init
- */
-DATA 4, MX6_MMDC_P0_MDPDC,     0x00020036
-DATA 4, MX6_MMDC_P0_MDOTC,     0x09444040
-
-DATA 4, MX6_MMDC_P0_MDCFG0,    0x898E7955
-DATA 4, MX6_MMDC_P0_MDCFG1,    0xFF328F64
-DATA 4, MX6_MMDC_P0_MDCFG2,    0x01FF00DB
-
-DATA 4, MX6_MMDC_P0_MDMISC,    0x00001740
-DATA 4, MX6_MMDC_P0_MDSCR,     0x00008000
-DATA 4, MX6_MMDC_P0_MDRWD,     0x000026D2
-DATA 4, MX6_MMDC_P0_MDOR,       0x008E1023
-
-/* CS0_END = 2304MB in step da 256Mb -> [(2304*8/256) - 1] */
-DATA 4, MX6_MMDC_P0_MDASP,     0x00000047
-
-/* SDE_1=0; ROW=3; BL=1; DSIZ=2 -> 64 bit */
-DATA 4, MX6_MMDC_P0_MDCTL,     0x841A0000
-
-/* Initialize DDR3 on CS_0 and CS_1 */
-DATA 4, MX6_MMDC_P0_MDSCR,     0x02088032
-DATA 4, MX6_MMDC_P0_MDSCR,     0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR,     0x00048031
-
-/* P0 01c */
-/* write 0x0940 to MR0 bank_0 (Burst Type=1 (Interlived)) */
-DATA 4, MX6_MMDC_P0_MDSCR,     0x09408030
-
-/*ZQ - Calibrationi */
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
-DATA 4, MX6_MMDC_P0_MDSCR,      0x04008040
-DATA 4, MX6_MMDC_P0_MDREF,      0x00007800
-
-DATA 4, MX6_MMDC_P0_MPODTCTRL,  0x00022227
-DATA 4, MX6_MMDC_P1_MPODTCTRL,  0x00022227
-
-DATA 4, MX6_MMDC_P0_MDPDC,      0x00025576
-
-DATA 4, MX6_MMDC_P0_MAPSR,      0x00011006
-DATA 4, MX6_MMDC_P0_MDSCR,      0x00000000
-
-/* set the default clock gate to save power */
-DATA 4, CCM_CCGR0, 0x00C03F3F
-DATA 4, CCM_CCGR1, 0x0030FC03
-DATA 4, CCM_CCGR2, 0x0FFFC000
-DATA 4, CCM_CCGR3, 0x3FF00000
-DATA 4, CCM_CCGR4, 0x00FFF300
-DATA 4, CCM_CCGR5, 0x0F0000C3
-DATA 4, CCM_CCGR6, 0x000003FF
-
-/* enable AXI cache for VDOA/VPU/IPU */
-DATA 4, MX6_IOMUXC_GPR4, 0xF00000FF
-
-/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-DATA 4, MX6_IOMUXC_GPR6, 0x007F007F
-DATA 4, MX6_IOMUXC_GPR7, 0x007F007F
-
diff --git a/board/seco/mx6quq7/mx6quq7.c b/board/seco/mx6quq7/mx6quq7.c
deleted file mode 100644 (file)
index a061d7d..0000000
+++ /dev/null
@@ -1,181 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2013 Freescale Semiconductor, Inc.
- * Copyright (C) 2015 ECA Sinters
- *
- * Author: Fabio Estevam <fabio.estevam@freescale.com>
- * Modified by: Boris Brezillon <boris.brezillon@free-electrons.com>
- */
-
-#include <init.h>
-#include <net.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <asm/global_data.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <malloc.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <asm/arch/mxc_hdmi.h>
-#include <asm/arch/crm_regs.h>
-#include <linux/fb.h>
-#include <ipu_pixfmt.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <i2c.h>
-
-#include "../common/mx6.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int dram_init(void)
-{
-       gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
-
-       return 0;
-}
-
-int board_early_init_f(void)
-{
-       seco_mx6_setup_uart_iomux();
-
-       return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
-       seco_mx6_rgmii_rework(phydev);
-       if (phydev->drv->config)
-               phydev->drv->config(phydev);
-
-       return 0;
-}
-
-int board_eth_init(struct bd_info *bis)
-{
-       uint32_t base = IMX_FEC_BASE;
-       struct mii_dev *bus = NULL;
-       struct phy_device *phydev = NULL;
-       int ret = 0;
-
-       seco_mx6_setup_enet_iomux();
-
-#ifdef CONFIG_FEC_MXC
-       bus = fec_get_miibus(base, -1);
-       if (!bus)
-               return -ENOMEM;
-
-       /* scan phy 4,5,6,7 */
-       phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
-       if (!phydev) {
-               free(bus);
-               return -ENOMEM;
-       }
-
-       printf("using phy at %d\n", phydev->addr);
-       ret  = fec_probe(bis, -1, base, bus, phydev);
-       if (ret) {
-               free(phydev);
-               free(bus);
-               printf("FEC MXC: %s:failed\n", __func__);
-       }
-#endif
-
-       return ret;
-}
-
-#define USDHC4_CD_GPIO         IMX_GPIO_NR(2, 6)
-
-static struct fsl_esdhc_cfg usdhc_cfg[2] = {
-       {USDHC3_BASE_ADDR, 0, 4},
-       {USDHC4_BASE_ADDR, 0, 4},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-       struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-       int ret = 0;
-
-       switch (cfg->esdhc_base) {
-       case USDHC3_BASE_ADDR:
-               ret = 1; /* Assume eMMC is always present */
-               break;
-       case USDHC4_BASE_ADDR:
-               ret = !gpio_get_value(USDHC4_CD_GPIO);
-               break;
-       }
-
-       return ret;
-}
-
-int board_mmc_init(struct bd_info *bis)
-{
-       u32 index = 0;
-       int ret;
-
-       /*
-        * Following map is done:
-        * (U-Boot device node)    (Physical Port)
-        * mmc0                    eMMC on Board
-        * mmc1                    Ext SD
-        */
-       for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
-               switch (index) {
-               case 0:
-                       seco_mx6_setup_usdhc_iomux(3);
-                       usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-                       break;
-               case 1:
-                       seco_mx6_setup_usdhc_iomux(4);
-                       usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
-                       break;
-
-               default:
-                       printf("Warning: %d exceed maximum number of SD ports %d\n",
-                              index + 1, CONFIG_SYS_FSL_USDHC_NUM);
-                       return -EINVAL;
-               }
-
-               ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
-               if (ret)
-                       return ret;
-       }
-
-       return 0;
-}
-
-int board_init(void)
-{
-       /* address of boot parameters */
-       gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-       imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D4__GPIO2_IO04 |
-                              MUX_PAD_CTRL(NO_PAD_CTRL));
-
-       gpio_direction_output(IMX_GPIO_NR(2, 4), 0);
-
-       /* Set Low */
-       gpio_set_value(IMX_GPIO_NR(2, 4), 0);
-       udelay(1000);
-
-       /* Set High */
-       gpio_set_value(IMX_GPIO_NR(2, 4), 1);
-
-       return 0;
-}
-
-int checkboard(void)
-{
-       puts("Board: SECO uQ7\n");
-
-       return 0;
-}
diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig
deleted file mode 100644 (file)
index cc56b2e..0000000
+++ /dev/null
@@ -1,39 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0xC0000
-CONFIG_MX6Q=y
-CONFIG_TARGET_SECOMX6=y
-CONFIG_SECOMX6_UQ7=y
-CONFIG_SECOMX6Q=y
-CONFIG_SECOMX6_2GB=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_BOOTDELAY=3
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="SECO MX6Q uQ7 U-Boot > "
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_FSL_USDHC=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_MII=y
-CONFIG_MXC_UART=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/secomx6quq7.h b/include/configs/secomx6quq7.h
deleted file mode 100644 (file)
index bd3c340..0000000
+++ /dev/null
@@ -1,81 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2013 Seco S.r.l
- *
- * Configuration settings for the Seco Boards.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include "mx6_common.h"
-
-#define CONFIG_BOARD_REVISION_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          (10 * SZ_1M)
-
-#define CONFIG_MXC_UART_BASE           UART2_BASE
-
-/* MMC Configuration */
-#define CONFIG_SYS_FSL_USDHC_NUM        2
-#define CONFIG_SYS_FSL_ESDHC_ADDR      0
-
-/* Ethernet Configuration */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RGMII
-#define CONFIG_ETHPRIME                        "FEC"
-#define CONFIG_FEC_MXC_PHYADDR         6
-
-#define CONFIG_EXTRA_ENV_SETTINGS                                      \
-       "netdev=eth0\0"                                                 \
-       "ethprime=FEC0\0"                                               \
-       "netdev=eth0\0"                                                 \
-       "ethprime=FEC0\0"                                               \
-       "uboot=u-boot.bin\0"                                            \
-       "kernel=uImage\0"                                               \
-       "nfsroot=/opt/eldk/arm\0"                                       \
-       "ip_local=10.0.0.5::10.0.0.1:255.255.255.0::eth0:off\0"         \
-       "ip_server=10.0.0.1\0"                                          \
-       "nfs_path=/targetfs \0"                                         \
-       "memory=mem=1024M\0"                                            \
-       "bootdev=mmc dev 0; ext2load mmc 0:1\0"                         \
-       "root=root=/dev/mmcblk0p1\0"                                    \
-       "option=rootwait rw fixrtc rootflags=barrier=1\0"               \
-       "cpu_freq=arm_freq=996\0"                                       \
-       "setbootargs=setenv bootargs console=ttymxc1,115200 ${root}"    \
-               " ${option} ${memory} ${cpu_freq}\0"                    \
-       "setbootargs_nfs=setenv bootargs console=ttymxc1,115200"        \
-               " root=/dev/nfs  nfsroot=${ip_server}:${nfs_path}"      \
-               " nolock,wsize=4096,rsize=4096  ip=:::::eth0:dhcp"      \
-               " ${memory} ${cpu_freq}\0"                              \
-       "setbootdev=setenv boot_dev ${bootdev} 10800000 /boot/uImage\0" \
-       "bootcmd=run setbootargs; run setbootdev; run boot_dev;"        \
-               " bootm 0x10800000\0"                                   \
-       "stdin=serial\0"                                                \
-       "stdout=serial\0"                                               \
-       "stderr=serial\0"
-
-#define CONFIG_SYS_HZ                  1000
-
-/* Physical Memory Map */
-#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
-#define PHYS_SDRAM_SIZE                        (2u * 1024 * 1024 * 1024)
-
-#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET      \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR                \
-       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* Environment organization */
-
-#if defined(CONFIG_ENV_IS_IN_MMC)
-       #define CONFIG_DYNAMIC_MMC_DEVNO
-#endif
-
-#endif /* __CONFIG_H */