2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com>
authorgretay <gretay@138bc75d-0d04-0410-961f-82ee72b054a4>
Fri, 5 Apr 2013 15:17:59 +0000 (15:17 +0000)
committergretay <gretay@138bc75d-0d04-0410-961f-82ee72b054a4>
Fri, 5 Apr 2013 15:17:59 +0000 (15:17 +0000)
* config/arm/arm.md (incscc,arm_incscc,decscc,arm_decscc): Delete.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@197519 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/arm/arm.md

index 31d0757..6a591f6 100644 (file)
@@ -1,5 +1,9 @@
 2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
 
+       * config/arm/arm.md (incscc,arm_incscc,decscc,arm_decscc): Delete.
+
+2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
+
        * config/arm/arm.md (addsi3_carryin_<optab>): Set attribute predicable.
        (addsi3_carryin_alt2_<optab>,addsi3_carryin_shift_<optab>): Likewise.
 
index c712b17..6dd6871 100644 (file)
    [(set_attr "conds" "set")]
 )
 
-(define_expand "incscc"
-  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
-        (plus:SI (match_operator:SI 2 "arm_comparison_operator"
-                    [(match_operand:CC 3 "cc_register" "") (const_int 0)])
-                 (match_operand:SI 1 "s_register_operand" "0,?r")))]
-  "TARGET_32BIT"
-  ""
-)
-
-(define_insn "*arm_incscc"
-  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
-        (plus:SI (match_operator:SI 2 "arm_comparison_operator"
-                    [(match_operand:CC 3 "cc_register" "") (const_int 0)])
-                 (match_operand:SI 1 "s_register_operand" "0,?r")))]
-  "TARGET_ARM"
-  "@
-  add%d2\\t%0, %1, #1
-  mov%D2\\t%0, %1\;add%d2\\t%0, %1, #1"
-  [(set_attr "conds" "use")
-   (set_attr "length" "4,8")]
-)
-
 ; transform ((x << y) - 1) to ~(~(x-1) << y)  Where X is a constant.
 (define_split
   [(set (match_operand:SI 0 "s_register_operand" "")
    (set_attr "type" "simple_alu_imm,*,*")]
 )
 
-(define_expand "decscc"
-  [(set (match_operand:SI            0 "s_register_operand" "=r,r")
-        (minus:SI (match_operand:SI  1 "s_register_operand" "0,?r")
-                 (match_operator:SI 2 "arm_comparison_operator"
-                   [(match_operand   3 "cc_register" "") (const_int 0)])))]
-  "TARGET_32BIT"
-  ""
-)
-
-(define_insn "*arm_decscc"
-  [(set (match_operand:SI            0 "s_register_operand" "=r,r")
-        (minus:SI (match_operand:SI  1 "s_register_operand" "0,?r")
-                 (match_operator:SI 2 "arm_comparison_operator"
-                   [(match_operand   3 "cc_register" "") (const_int 0)])))]
-  "TARGET_ARM"
-  "@
-   sub%d2\\t%0, %1, #1
-   mov%D2\\t%0, %1\;sub%d2\\t%0, %1, #1"
-  [(set_attr "conds" "use")
-   (set_attr "length" "*,8")
-   (set_attr "type" "simple_alu_imm,*")]
-)
-
 (define_expand "subsf3"
   [(set (match_operand:SF           0 "s_register_operand" "")
        (minus:SF (match_operand:SF 1 "s_register_operand" "")