Set primary plane format to RGBX.

 BZ: 33412

 This is the kernel part of patch to fix regression caused by HWC overlay + sprite blending
implementation. We have a hw issue in display controller to display RGBA plane. We can't set
it to RGBA if there only primary plane is displayed. This patch will set primary plane to RGBX
if no overlay displayed, other wise it is set to RGBA.

Change-Id: I1f74dfb2841df771e1b9a0b14d390b17eb49ab40
Signed-off-by: Marc Mao <marc.mao@intel.com>
Reviewed-on: http://android.intel.com:8080/47155
Reviewed-by: Xu, Randy <randy.xu@intel.com>
Reviewed-by: Hu, Austin <austin.hu@intel.com>
Reviewed-by: Ai, Ke <ke.ai@intel.com>
Tested-by: Tong, BoX <box.tong@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/drivers/staging/mrst/drv/psb_intel_reg.h b/drivers/staging/mrst/drv/psb_intel_reg.h
index 4053190..64b3a2d 100644 (file)
--- a/drivers/staging/mrst/drv/psb_intel_reg.h
+++ b/drivers/staging/mrst/drv/psb_intel_reg.h
@@ -601,6 +601,9 @@ struct dpst_guardband {
 #define OVC_OGAMC1             0x38020
 #define OVC_OGAMC0             0x38024
 
+#define OACOMD                 0x30168
+#define OV_ENBL                0x1
+
 /*
  * Some BIOS scratch area registers.  The 845 (and 830?) store the amount
  * of video memory available to the BIOS in SWF1.

diff --git a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_linux.c b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_linux.c
index e1b7f33..1c8d5fe 100644 (file)
--- a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_linux.c
+++ b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_drm/drmlfb_linux.c
@@ -206,7 +206,7 @@ void MRSTLFBSavePlaneConfig(MRSTLFB_DEVINFO *psDevInfo)
                break;
        case PVRSRV_PIXEL_FORMAT_ARGB8888:
        default:
-               uPlaneFormat = DISPPLANE_32BPP;
+               uPlaneFormat = DISPPLANE_32BPP_NO_ALPHA;
                break;
        }
 
@@ -238,16 +238,25 @@ void MRSTLFBRestorePlaneConfig(MRSTLFB_DEVINFO *psDevInfo)
        struct drm_psb_private *dev_priv =
                (struct drm_psb_private *) psDevInfo->psDrmDevice->dev_private;
        u32 uDspCntr = 0;
+       u32 uOAEn;
 
        if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, false))
                return;
+       /* Overlay A command register */
+       uOAEn = PSB_RVDC32(OACOMD);
+
        uDspCntr = PSB_RVDC32(DSPACNTR);
        uDspCntr &= ~(0xf << 26);
-       uDspCntr |= psDevInfo->uPlaneACntr;
+
+       if ((uOAEn & OV_ENBL) && (psDevInfo->uPlaneACntr == DISPPLANE_32BPP_NO_ALPHA))
+               uDspCntr |= DISPPLANE_32BPP;
+       else
+               uDspCntr |= psDevInfo->uPlaneACntr;
        PSB_WVDC32(uDspCntr, DSPACNTR);
        PSB_WVDC32(psDevInfo->uPlaneAStride, DSPASTRIDE);
        PSB_WVDC32(psDevInfo->uPlaneAPos, DSPAPOS);
        PSB_WVDC32(psDevInfo->uPlaneASize, DSPASIZE);
+
 #ifdef CONFIG_MDFD_HDMI
        /*TODO: fully support HDMI later*/
        /*PSB_WVDC32(psDevInfo->uPlaneBCntr, DSPBCNTR);*/