Update tensorflow register file (#2531)
author윤지영/동작제어Lab(SR)/Engineer/삼성전자 <jy910.yun@samsung.com>
Thu, 30 Aug 2018 09:47:46 +0000 (18:47 +0900)
committer이춘석/동작제어Lab(SR)/Staff Engineer/삼성전자 <chunseok.lee@samsung.com>
Thu, 30 Aug 2018 09:47:46 +0000 (18:47 +0900)
These operators are supported by Tensorflow v1.9.0

Signed-off-by: Jiyoung Yun <jy910.yun@samsung.com>
libs/support/tflite/src/kernels/register.cpp

index 1daafe0..0a28af3 100644 (file)
@@ -60,6 +60,7 @@ TfLiteRegistration *Register_LSTM();
 TfLiteRegistration *Register_BIDIRECTIONAL_SEQUENCE_LSTM();
 TfLiteRegistration *Register_UNIDIRECTIONAL_SEQUENCE_LSTM();
 TfLiteRegistration *Register_PAD();
+TfLiteRegistration *Register_PADV2();
 TfLiteRegistration *Register_RESHAPE();
 TfLiteRegistration *Register_RESIZE_BILINEAR();
 TfLiteRegistration *Register_SKIP_GRAM();
@@ -75,6 +76,21 @@ TfLiteRegistration *Register_TOPK_V2();
 TfLiteRegistration *Register_LOG_SOFTMAX();
 TfLiteRegistration *Register_CAST();
 TfLiteRegistration *Register_DEQUANTIZE();
+TfLiteRegistration *Register_PRELU();
+TfLiteRegistration *Register_MAXIMUM();
+TfLiteRegistration *Register_MINIMUM();
+TfLiteRegistration *Register_ARG_MAX();
+TfLiteRegistration *Register_GREATER();
+TfLiteRegistration *Register_GREATER_EQUAL();
+TfLiteRegistration *Register_LESS();
+TfLiteRegistration *Register_LESS_EQUAL();
+TfLiteRegistration *Register_FLOOR();
+TfLiteRegistration *Register_NEG();
+TfLiteRegistration *Register_SELECT();
+TfLiteRegistration *Register_SLICE();
+TfLiteRegistration *Register_SIN();
+TfLiteRegistration *Register_TRANSPOSE_CONV();
+TfLiteRegistration *Register_SPARSE_TO_DENSE();
 
 BuiltinOpResolver::BuiltinOpResolver()
 {
@@ -109,6 +125,7 @@ BuiltinOpResolver::BuiltinOpResolver()
   AddBuiltin(BuiltinOperator_BIDIRECTIONAL_SEQUENCE_LSTM, Register_BIDIRECTIONAL_SEQUENCE_LSTM());
   AddBuiltin(BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM, Register_UNIDIRECTIONAL_SEQUENCE_LSTM());
   AddBuiltin(BuiltinOperator_PAD, Register_PAD());
+  AddBuiltin(BuiltinOperator_PADV2, Register_PADV2());
   AddBuiltin(BuiltinOperator_RESHAPE, Register_RESHAPE());
   AddBuiltin(BuiltinOperator_RESIZE_BILINEAR, Register_RESIZE_BILINEAR());
   AddBuiltin(BuiltinOperator_SKIP_GRAM, Register_SKIP_GRAM());
@@ -126,6 +143,21 @@ BuiltinOpResolver::BuiltinOpResolver()
   AddBuiltin(BuiltinOperator_LOG_SOFTMAX, Register_LOG_SOFTMAX());
   AddBuiltin(BuiltinOperator_CAST, Register_CAST());
   AddBuiltin(BuiltinOperator_DEQUANTIZE, Register_DEQUANTIZE());
+  AddBuiltin(BuiltinOperator_PRELU, Register_PRELU());
+  AddBuiltin(BuiltinOperator_MAXIMUM, Register_MAXIMUM());
+  AddBuiltin(BuiltinOperator_MINIMUM, Register_MINIMUM());
+  AddBuiltin(BuiltinOperator_ARG_MAX, Register_ARG_MAX());
+  AddBuiltin(BuiltinOperator_GREATER, Register_GREATER());
+  AddBuiltin(BuiltinOperator_GREATER_EQUAL, Register_GREATER_EQUAL());
+  AddBuiltin(BuiltinOperator_LESS, Register_LESS());
+  AddBuiltin(BuiltinOperator_LESS_EQUAL, Register_LESS_EQUAL());
+  AddBuiltin(BuiltinOperator_FLOOR, Register_FLOOR());
+  AddBuiltin(BuiltinOperator_NEG, Register_NEG());
+  AddBuiltin(BuiltinOperator_SELECT, Register_SELECT());
+  AddBuiltin(BuiltinOperator_SLICE, Register_SLICE());
+  AddBuiltin(BuiltinOperator_SIN, Register_SIN());
+  AddBuiltin(BuiltinOperator_TRANSPOSE_CONV, Register_TRANSPOSE_CONV());
+  AddBuiltin(BuiltinOperator_SPARSE_TO_DENSE, Register_SPARSE_TO_DENSE());
 
   AddCustom("TensorFlowMax", tflite::ops::custom::nnfw::Register_TensorFlowMax());
   AddCustom("RSQRT", tflite::ops::custom::nnfw::Register_RSQRT());