ASoC: AMD: Fix Capture DMA channel names
authorDaniel Kurtz <djkurtz@chromium.org>
Mon, 2 Jul 2018 21:19:53 +0000 (15:19 -0600)
committerMark Brown <broonie@kernel.org>
Tue, 3 Jul 2018 15:14:30 +0000 (16:14 +0100)
On capture, audio data is first copied from I2S to ACP memory, and then
to SYSRAM.  For each step the channel number increases, so the names in
the driver were wrong.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/amd/acp-pcm-dma.c
sound/soc/amd/acp.h

index 034fac3de0372722b61af7889290588ebe8d2c8a..df53412967e1713b5789621591b308d9869aca6c 100644 (file)
@@ -697,31 +697,31 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
-       if ((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) != 0) {
+       if ((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) != 0) {
                valid_irq = true;
                snd_pcm_period_elapsed(irq_data->capture_i2ssp_stream);
-               acp_reg_write((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) << 16,
+               acp_reg_write((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) << 16,
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
-       if ((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) != 0) {
+       if ((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) != 0) {
                valid_irq = true;
-               acp_reg_write((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) << 16,
+               acp_reg_write((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) << 16,
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
-       if ((intr_flag & BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) != 0) {
+       if ((intr_flag & BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) != 0) {
                valid_irq = true;
                snd_pcm_period_elapsed(irq_data->capture_i2sbt_stream);
                acp_reg_write((intr_flag &
-                             BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) << 16,
+                             BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) << 16,
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
-       if ((intr_flag & BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) != 0) {
+       if ((intr_flag & BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) != 0) {
                valid_irq = true;
                acp_reg_write((intr_flag &
-                             BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) << 16,
+                             BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) << 16,
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
@@ -899,8 +899,8 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream,
                switch (rtd->i2s_instance) {
                case I2S_BT_INSTANCE:
                        rtd->pte_offset = ACP_ST_BT_CAPTURE_PTE_OFFSET;
-                       rtd->ch1 = ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM;
-                       rtd->ch2 = I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM;
+                       rtd->ch1 = I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM;
+                       rtd->ch2 = ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM;
                        rtd->sram_bank = ACP_SRAM_BANK_4_ADDRESS;
                        rtd->destination = FROM_BLUETOOTH;
                        rtd->dma_dscr_idx_1 = CAPTURE_START_DMA_DESCR_CH10;
@@ -914,8 +914,8 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream,
                case I2S_SP_INSTANCE:
                default:
                        rtd->pte_offset = ACP_CAPTURE_PTE_OFFSET;
-                       rtd->ch1 = ACP_TO_SYSRAM_CH_NUM;
-                       rtd->ch2 = I2S_TO_ACP_DMA_CH_NUM;
+                       rtd->ch1 = I2S_TO_ACP_DMA_CH_NUM;
+                       rtd->ch2 = ACP_TO_SYSRAM_CH_NUM;
                        switch (adata->asic_type) {
                        case CHIP_STONEY:
                                rtd->pte_offset = ACP_ST_CAPTURE_PTE_OFFSET;
index 3190fdce630749c3bb9a968b0e99fdc38b508b08..0a2240bff62e14fe93292ded2dea3c2925303bcd 100644 (file)
 #define ACP_TO_I2S_DMA_CH_NUM 13
 
 /* Capture DMA channels */
-#define ACP_TO_SYSRAM_CH_NUM 14
-#define I2S_TO_ACP_DMA_CH_NUM 15
+#define I2S_TO_ACP_DMA_CH_NUM 14
+#define ACP_TO_SYSRAM_CH_NUM 15
 
 /* Playback DMA Channels for I2S BT instance */
 #define SYSRAM_TO_ACP_BT_INSTANCE_CH_NUM  8
 #define ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM 9
 
 /* Capture DMA Channels for I2S BT Instance */
-#define ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM 10
-#define I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM 11
+#define I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM 10
+#define ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM 11
 
 #define NUM_DSCRS_PER_CHANNEL 2