Currently we hardcode ALTIVEC_REGS for register constraint v and
RS6000_CONSTRAINT_v looks confusing, this is to fix it with
rs6000_constraints[RS6000_CONSTRAINT_v] to align with some other
existing register constraints with RS6000_CONSTRAINT_*.
gcc/ChangeLog:
* config/rs6000/constraints.md (register constraint v): Use
rs6000_constraints[RS6000_CONSTRAINT_v] instead of ALTIVEC_REGS.
historically @code{f} was for single-precision and @code{d} was for
double-precision floating point.")
-(define_register_constraint "v" "ALTIVEC_REGS"
+(define_register_constraint "v" "rs6000_constraints[RS6000_CONSTRAINT_v]"
"An Altivec vector register (VR), @code{v0}@dots{}@code{v31}.")
(define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]"