clk: imx: pll14xx: Add the device as argument when registering
authorAbel Vesa <abel.vesa@nxp.com>
Wed, 15 Apr 2020 08:02:46 +0000 (11:02 +0300)
committerShawn Guo <shawnguo@kernel.org>
Wed, 29 Apr 2020 02:00:42 +0000 (10:00 +0800)
In order to allow runtime PM, the device needs to be passed on
to the register function. Audiomix clock controller, used on
i.MX8MP and future platforms, registers a pll14xx and has runtime
PM support.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-pll14xx.c
drivers/clk/imx/clk.h

index a83bbbe..f9eb189 100644 (file)
@@ -378,9 +378,9 @@ static const struct clk_ops clk_pll1443x_ops = {
        .set_rate       = clk_pll1443x_set_rate,
 };
 
-struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
-                                 void __iomem *base,
-                                 const struct imx_pll14xx_clk *pll_clk)
+struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
+                               const char *parent_name, void __iomem *base,
+                               const struct imx_pll14xx_clk *pll_clk)
 {
        struct clk_pll14xx *pll;
        struct clk_hw *hw;
@@ -426,7 +426,7 @@ struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
 
        hw = &pll->hw;
 
-       ret = clk_hw_register(NULL, hw);
+       ret = clk_hw_register(dev, hw);
        if (ret) {
                pr_err("%s: failed to register pll %s %d\n",
                        __func__, name, ret);
index 01ff1db..fcd9952 100644 (file)
@@ -133,9 +133,9 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
 #define imx_clk_pll14xx(name, parent_name, base, pll_clk) \
        to_clk(imx_clk_hw_pll14xx(name, parent_name, base, pll_clk))
 
-struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
-                                 void __iomem *base,
-                                 const struct imx_pll14xx_clk *pll_clk);
+struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
+                               const char *parent_name, void __iomem *base,
+                               const struct imx_pll14xx_clk *pll_clk);
 
 struct clk_hw *imx_clk_hw_pllv1(enum imx_pllv1_type type, const char *name,
                const char *parent, void __iomem *base);
@@ -242,6 +242,13 @@ static inline struct clk *to_clk(struct clk_hw *hw)
        return hw->clk;
 }
 
+static inline struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
+                                 void __iomem *base,
+                                 const struct imx_pll14xx_clk *pll_clk)
+{
+       return imx_dev_clk_hw_pll14xx(NULL, name, parent_name, base, pll_clk);
+}
+
 static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate)
 {
        return clk_hw_register_fixed_rate(NULL, name, NULL, 0, rate);