gas/

	* config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP.
	* doc/c-mips.texi: Mention XLP.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 8402be4..8fdde79 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
+
+       * config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP.
+       * doc/c-mips.texi: Mention XLP.
+
 2012-03-21  Thomas Schwinge  <thomas@codesourcery.com>
 
        [SH] Support the .uaquad and .8byte directives also for non-sh64

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index f23835a..449d8c3 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -19115,6 +19115,11 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   /* RMI Xlr */
   { "xlr",           0,      ISA_MIPS64,     CPU_XLR },
 
+  /* Broadcom XLP.
+     XLP is mostly like XLR, with the prominent exception that it is
+     MIPS64R2 rather than MIPS64.  */
+  { "xlp",           0,      ISA_MIPS64R2,     CPU_XLR },
+
   /* End marker */
   { NULL, 0, 0, 0 }
 };

diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 7fe9337..4124213 100644 (file)
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -325,7 +325,8 @@ loongson3a,
 octeon,
 octeon+,
 octeon2,
-xlr
+xlr,
+xlp
 @end quotation
 
 For compatibility reasons, @samp{@var{n}x} and @samp{@var{b}fx} are

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 37f6364..a726499 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
+
+       * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
+
 2012-03-16  Alan Modra  <amodra@gmail.com>
 
        * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 0d1de30..6651daa 100644 (file)
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -619,6 +619,14 @@ const struct mips_arch_choice mips_arch_choices[] =
     mips_cp0sel_names_xlr, ARRAY_SIZE (mips_cp0sel_names_xlr),
     mips_hwr_names_numeric },
 
+  /* XLP is mostly like XLR, with the prominent exception it is being
+     MIPS64R2.  */
+  { "xlp", 1, bfd_mach_mips_xlr, CPU_XLR,
+    ISA_MIPS64R2 | INSN_XLR,
+    mips_cp0_names_xlr,
+    mips_cp0sel_names_xlr, ARRAY_SIZE (mips_cp0sel_names_xlr),
+    mips_hwr_names_numeric },
+
   /* This entry, mips16, is here only for ISA/processor selection; do
      not print its name.  */
   { "",                1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3,