soc/tegra: fuse: Fix reading registers using DMA on Tegra20

FUSE driver doesn't configure DMA channel properly, because of it DMA
transfer is never issued and tegra20_fuse_read() always return 0x0.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
index d7ccfee..a33ee8e 100644 (file)
--- a/drivers/soc/tegra/fuse/fuse-tegra.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra.c
@@ -135,6 +135,7 @@ static int tegra_fuse_probe(struct platform_device *pdev)
 
        /* take over the memory region from the early initialization */
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       fuse->phys = res->start;
        fuse->base = devm_ioremap_resource(&pdev->dev, res);
        if (IS_ERR(fuse->base))
                return PTR_ERR(fuse->base);

diff --git a/drivers/soc/tegra/fuse/fuse-tegra20.c b/drivers/soc/tegra/fuse/fuse-tegra20.c
index 294413a..27e9ac7 100644 (file)
--- a/drivers/soc/tegra/fuse/fuse-tegra20.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra20.c
@@ -59,7 +59,7 @@ static u32 tegra20_fuse_read(struct tegra_fuse *fuse, unsigned int offset)
 
        mutex_lock(&fuse->apbdma.lock);
 
-       fuse->apbdma.config.src_addr = fuse->apbdma.phys + FUSE_BEGIN + offset;
+       fuse->apbdma.config.src_addr = fuse->phys + FUSE_BEGIN + offset;
 
        err = dmaengine_slave_config(fuse->apbdma.chan, &fuse->apbdma.config);
        if (err)
@@ -119,6 +119,8 @@ static int tegra20_fuse_probe(struct tegra_fuse *fuse)
        fuse->apbdma.config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
        fuse->apbdma.config.src_maxburst = 1;
        fuse->apbdma.config.dst_maxburst = 1;
+       fuse->apbdma.config.direction = DMA_DEV_TO_MEM;
+       fuse->apbdma.config.device_fc = false;
 
        init_completion(&fuse->apbdma.wait);
        mutex_init(&fuse->apbdma.lock);