Merge commit 'v2.6.32'
authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Mon, 14 Dec 2009 18:23:03 +0000 (19:23 +0100)
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Mon, 14 Dec 2009 18:23:03 +0000 (19:23 +0100)
Conflicts:
arch/avr32/mach-at32ap/include/mach/cpu.h

arch/avr32/boards/atngw100/mrmt.c
arch/avr32/boards/atngw100/setup.c
arch/avr32/kernel/vmlinux.lds.S
arch/avr32/mach-at32ap/at32ap700x.c
arch/avr32/mach-at32ap/include/mach/board.h

index bf78e51..7919be3 100644 (file)
@@ -302,6 +302,7 @@ static int __init mrmt1_init(void)
        at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
                        GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
        set_irq_type( AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING );
+       at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info));
        spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info));
 #endif
 
index bc299fb..5b022aa 100644 (file)
@@ -56,13 +56,8 @@ static struct spi_board_info spi0_board_info[] __initdata = {
 static struct mci_platform_data __initdata mci0_data = {
        .slot[0] = {
                .bus_width      = 4,
-#if defined(CONFIG_BOARD_ATNGW100_EVKLCD10X) || defined(CONFIG_BOARD_ATNGW100_MRMT1)
-               .detect_pin     = GPIO_PIN_NONE,
-               .wp_pin         = GPIO_PIN_NONE,
-#else
                .detect_pin     = GPIO_PIN_PC(25),
                .wp_pin         = GPIO_PIN_PE(0),
-#endif
        },
 };
 
index c4b5665..9cd2bd9 100644 (file)
@@ -39,30 +39,10 @@ SECTIONS
                __tagtable_begin = .;
                        *(.taglist.init)
                __tagtable_end = .;
-                       INIT_DATA
-               . = ALIGN(16);
-               __setup_start = .;
-                       *(.init.setup)
-               __setup_end = .;
-               . = ALIGN(4);
-               __initcall_start = .;
-                       INITCALLS
-               __initcall_end = .;
-               __con_initcall_start = .;
-                       *(.con_initcall.init)
-               __con_initcall_end = .;
-               __security_initcall_start = .;
-                       *(.security_initcall.init)
-               __security_initcall_end = .;
-#ifdef CONFIG_BLK_DEV_INITRD
-               . = ALIGN(32);
-               __initramfs_start = .;
-                       *(.init.ramfs)
-               __initramfs_end = .;
-#endif
-               . = ALIGN(PAGE_SIZE);
-               __init_end = .;
        }
+       INIT_DATA_SECTION(16)
+       . = ALIGN(PAGE_SIZE);
+       __init_end = .;
 
        .text           : AT(ADDR(.text) - LOAD_OFFSET) {
                _evba = .;
@@ -78,34 +58,16 @@ SECTIONS
                _etext = .;
        } = 0xd703d703
 
-       . = ALIGN(4);
-       __ex_table      : AT(ADDR(__ex_table) - LOAD_OFFSET) {
-               __start___ex_table = .;
-               *(__ex_table)
-               __stop___ex_table = .;
-       }
-
+       EXCEPTION_TABLE(4)
        RODATA
 
-       . = ALIGN(THREAD_SIZE);
-
        .data           : AT(ADDR(.data) - LOAD_OFFSET) {
                _data = .;
                _sdata = .;
-               /*
-                * First, the init task union, aligned to an 8K boundary.
-                */
-               *(.data.init_task)
 
-               /* Then, the page-aligned data */
-               . = ALIGN(PAGE_SIZE);
-               *(.data.page_aligned)
-
-               /* Then, the cacheline aligned data */
-               . = ALIGN(L1_CACHE_BYTES);
-               *(.data.cacheline_aligned)
-
-               /* And the rest... */
+               INIT_TASK_DATA(THREAD_SIZE)
+               PAGE_ALIGNED_DATA(PAGE_SIZE);
+               CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
                *(.data.rel*)
                DATA_DATA
                CONSTRUCTORS
@@ -113,16 +75,8 @@ SECTIONS
                _edata = .;
        }
 
-
-       . = ALIGN(8);
-       .bss            : AT(ADDR(.bss) - LOAD_OFFSET) {
-               __bss_start = .;
-               *(.bss)
-               *(COMMON)
-               . = ALIGN(8);
-               __bss_stop = .;
-               _end = .;
-       }
+       BSS_SECTION(0, 8, 8)
+       _end = .;
 
        DWARF_DEBUG
 
index eb9d4dc..a47592e 100644 (file)
@@ -1181,19 +1181,32 @@ static struct resource atmel_spi1_resource[] = {
 DEFINE_DEV(atmel_spi, 1);
 DEV_CLK(spi_clk, atmel_spi1, pba, 1);
 
-static void __init
-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
-                     unsigned int n, const u8 *pins)
+void __init
+at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, unsigned int n)
 {
+       /*
+        * Manage the chipselects as GPIOs, normally using the same pins
+        * the SPI controller expects; but boards can use other pins.
+        */
+       static u8 __initdata spi_pins[][4] = {
+               { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+                 GPIO_PIN_PA(5), GPIO_PIN_PA(20) },
+               { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+                 GPIO_PIN_PB(4), GPIO_PIN_PA(27) },
+       };
        unsigned int pin, mode;
 
+       /* There are only 2 SPI controllers */
+       if (bus_num > 1)
+               return;
+
        for (; n; n--, b++) {
                b->bus_num = bus_num;
                if (b->chip_select >= 4)
                        continue;
                pin = (unsigned)b->controller_data;
                if (!pin) {
-                       pin = pins[b->chip_select];
+                       pin = spi_pins[bus_num][b->chip_select];
                        b->controller_data = (void *)pin;
                }
                mode = AT32_GPIOF_OUTPUT;
@@ -1206,16 +1219,6 @@ at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
 struct platform_device *__init
 at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
 {
-       /*
-        * Manage the chipselects as GPIOs, normally using the same pins
-        * the SPI controller expects; but boards can use other pins.
-        */
-       static u8 __initdata spi0_pins[] =
-               { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
-                 GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
-       static u8 __initdata spi1_pins[] =
-               { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
-                 GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
        struct platform_device *pdev;
        u32 pin_mask;
 
@@ -1228,7 +1231,7 @@ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
                select_peripheral(PIOA, (1 << 0), PERIPH_A, AT32_GPIOF_PULLUP);
                select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
 
-               at32_spi_setup_slaves(0, b, n, spi0_pins);
+               at32_spi_setup_slaves(0, b, n);
                break;
 
        case 1:
@@ -1239,7 +1242,7 @@ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
                select_peripheral(PIOB, (1 << 0), PERIPH_B, AT32_GPIOF_PULLUP);
                select_peripheral(PIOB, pin_mask, PERIPH_B, 0);
 
-               at32_spi_setup_slaves(1, b, n, spi1_pins);
+               at32_spi_setup_slaves(1, b, n);
                break;
 
        default:
index ddedb47..c7f25bb 100644 (file)
@@ -49,6 +49,7 @@ at32_add_device_eth(unsigned int id, struct eth_platform_data *data);
 struct spi_board_info;
 struct platform_device *
 at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
+void at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, unsigned int n);
 
 struct atmel_lcdfb_info;
 struct platform_device *