arm64: dts: mediatek: mt8186: Add crypto support for eMMC controller

For crypto support, add a crypto clock of the inline crypto engine and
expand the register size in the eMMC controller.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Link: https://lore.kernel.org/r/20221221104856.28770-1-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 6321b7a..c0a3afd 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -911,12 +911,13 @@
                mmc0: mmc@11230000 {
                        compatible = "mediatek,mt8186-mmc",
                                     "mediatek,mt8183-mmc";
-                       reg = <0 0x11230000 0 0x1000>,
+                       reg = <0 0x11230000 0 0x10000>,
                              <0 0x11cd0000 0 0x1000>;
                        clocks = <&topckgen CLK_TOP_MSDC50_0>,
                                 <&infracfg_ao CLK_INFRA_AO_MSDC0>,
-                                <&infracfg_ao CLK_INFRA_AO_MSDC0_SRC>;
-                       clock-names = "source", "hclk", "source_cg";
+                                <&infracfg_ao CLK_INFRA_AO_MSDC0_SRC>,
+                                <&infracfg_ao CLK_INFRA_AO_MSDCFDE>;
+                       clock-names = "source", "hclk", "source_cg", "crypto";
                        interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
                        assigned-clocks = <&topckgen CLK_TOP_MSDC50_0>;
                        assigned-clock-parents = <&apmixedsys CLK_APMIXED_MSDCPLL>;