net/mlx5: Let user configure max_macs param
authorShay Drory <shayd@nvidia.com>
Mon, 16 Aug 2021 05:41:08 +0000 (08:41 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Mon, 25 Oct 2021 20:51:21 +0000 (13:51 -0700)
Currently, max_macs is taking 70Kbytes of memory per function. This
size is not needed in all use cases, and is critical with large scale.
Hence, allow user to configure the number of max_macs.

For example, to reduce the number of max_macs to 1, execute::
$ devlink dev param set pci/0000:00:0b.0 name max_macs value 1 \
              cmode driverinit
$ devlink dev reload pci/0000:00:0b.0

Signed-off-by: Shay Drory <shayd@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Reviewed-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Documentation/networking/devlink/mlx5.rst
drivers/net/ethernet/mellanox/mlx5/core/devlink.c
drivers/net/ethernet/mellanox/mlx5/core/main.c
include/linux/mlx5/mlx5_ifc.h

index 5b77863f9c88f0c2b0da0a631e145ab8fa5cc3a8..d467e770906ed6d74ce19ba342d24eb0064bbfcc 100644 (file)
@@ -14,8 +14,12 @@ Parameters
 
    * - Name
      - Mode
+     - Validation
    * - ``enable_roce``
      - driverinit
+   * - ``max_macs``
+     - driverinit
+     - The range is between 1 and 2^31. Only power of 2 values are supported.
 
 The ``mlx5`` driver also implements the following driver-specific
 parameters.
index 1c98652b244a0b9eed311d9e750a90c3e31b8e55..fc78c745ead14680d362041c77f3e4ce0b2a969a 100644 (file)
@@ -752,6 +752,68 @@ static void mlx5_devlink_auxdev_params_unregister(struct devlink *devlink)
        mlx5_devlink_eth_param_unregister(devlink);
 }
 
+static int mlx5_devlink_max_uc_list_validate(struct devlink *devlink, u32 id,
+                                            union devlink_param_value val,
+                                            struct netlink_ext_ack *extack)
+{
+       struct mlx5_core_dev *dev = devlink_priv(devlink);
+
+       /* At least one unicast mac is needed */
+       if (val.vu32 == 0) {
+               NL_SET_ERR_MSG_MOD(extack, "max_macs value must be greater than 0");
+               return -EINVAL;
+       }
+       /* Check if its power of 2 or not */
+       if (!is_power_of_2(val.vu32)) {
+               NL_SET_ERR_MSG_MOD(extack,
+                                  "Only power of 2 values are supported for max_macs");
+               return -EOPNOTSUPP;
+       }
+
+       if (ilog2(val.vu32) >
+           MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list)) {
+               NL_SET_ERR_MSG_MOD(extack, "max_macs value is out of the supported range");
+               return -EOPNOTSUPP;
+       }
+
+       return 0;
+}
+
+static const struct devlink_param max_uc_list_param =
+       DEVLINK_PARAM_GENERIC(MAX_MACS, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
+                             NULL, NULL, mlx5_devlink_max_uc_list_validate);
+
+static int mlx5_devlink_max_uc_list_param_register(struct devlink *devlink)
+{
+       struct mlx5_core_dev *dev = devlink_priv(devlink);
+       union devlink_param_value value;
+       int err;
+
+       if (!MLX5_CAP_GEN(dev, log_max_current_uc_list_wr_supported))
+               return 0;
+
+       err = devlink_param_register(devlink, &max_uc_list_param);
+       if (err)
+               return err;
+
+       value.vu32 = 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list);
+       devlink_param_driverinit_value_set(devlink,
+                                          DEVLINK_PARAM_GENERIC_ID_MAX_MACS,
+                                          value);
+       return 0;
+}
+
+static void
+mlx5_devlink_max_uc_list_param_unregister(struct devlink *devlink)
+{
+       struct mlx5_core_dev *dev = devlink_priv(devlink);
+
+       if (!MLX5_CAP_GEN(dev, log_max_current_uc_list_wr_supported))
+               return;
+
+       devlink_param_unregister(devlink, &max_uc_list_param);
+}
+
 #define MLX5_TRAP_DROP(_id, _group_id)                                 \
        DEVLINK_TRAP_GENERIC(DROP, DROP, _id,                           \
                             DEVLINK_TRAP_GROUP_GENERIC_ID_##_group_id, \
@@ -815,11 +877,17 @@ int mlx5_devlink_register(struct devlink *devlink)
        if (err)
                goto traps_reg_err;
 
+       err = mlx5_devlink_max_uc_list_param_register(devlink);
+       if (err)
+               goto uc_list_reg_err;
+
        if (!mlx5_core_is_mp_slave(dev))
                devlink_set_features(devlink, DEVLINK_F_RELOAD);
 
        return 0;
 
+uc_list_reg_err:
+       mlx5_devlink_traps_unregister(devlink);
 traps_reg_err:
        mlx5_devlink_auxdev_params_unregister(devlink);
 auxdev_reg_err:
@@ -830,6 +898,7 @@ auxdev_reg_err:
 
 void mlx5_devlink_unregister(struct devlink *devlink)
 {
+       mlx5_devlink_max_uc_list_param_unregister(devlink);
        mlx5_devlink_traps_unregister(devlink);
        mlx5_devlink_auxdev_params_unregister(devlink);
        devlink_params_unregister(devlink, mlx5_devlink_params,
index 96fdbc0c87bf8f90966d926c58f87a0f4fe6674a..079ee9e8da108e9fadf2ed23a133b7abf2c585a9 100644 (file)
@@ -484,10 +484,23 @@ static int handle_hca_cap_odp(struct mlx5_core_dev *dev, void *set_ctx)
        return set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_ODP);
 }
 
+static int max_uc_list_get_devlink_param(struct mlx5_core_dev *dev)
+{
+       struct devlink *devlink = priv_to_devlink(dev);
+       union devlink_param_value val;
+       int err;
+
+       err = devlink_param_driverinit_value_get(devlink,
+                                                DEVLINK_PARAM_GENERIC_ID_MAX_MACS,
+                                                &val);
+       return err ? 0 : val.vu32;
+}
+
 static int handle_hca_cap(struct mlx5_core_dev *dev, void *set_ctx)
 {
        struct mlx5_profile *prof = &dev->profile;
        void *set_hca_cap;
+       u32 max_uc_list;
        int err;
 
        err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL);
@@ -561,6 +574,11 @@ static int handle_hca_cap(struct mlx5_core_dev *dev, void *set_ctx)
        if (MLX5_CAP_GEN(dev, roce_rw_supported))
                MLX5_SET(cmd_hca_cap, set_hca_cap, roce, mlx5_is_roce_init_enabled(dev));
 
+       max_uc_list = max_uc_list_get_devlink_param(dev);
+       if (max_uc_list)
+               MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_current_uc_list,
+                        ilog2(max_uc_list));
+
        return set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE);
 }
 
index 746381eccccf265e2b4edf7ebd060f30963b0e71..97465d00de9d09cdac22adc829b2e20646de82a2 100644 (file)
@@ -1603,7 +1603,7 @@ struct mlx5_ifc_cmd_hca_cap_bits {
 
        u8         ext_stride_num_range[0x1];
        u8         roce_rw_supported[0x1];
-       u8         reserved_at_3a2[0x1];
+       u8         log_max_current_uc_list_wr_supported[0x1];
        u8         log_max_stride_sz_rq[0x5];
        u8         reserved_at_3a8[0x3];
        u8         log_min_stride_sz_rq[0x5];