platform/x86: intel_mid_powerbtn: Acknowledge interrupts

Some platforms require interrupt to be acknowledged by clearing
MSIC_PWRBTNM bit in interrupt level 1 mask register.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

diff --git a/drivers/platform/x86/intel_mid_powerbtn.c b/drivers/platform/x86/intel_mid_powerbtn.c
index 596ac9f..ac02a0b 100644 (file)
--- a/drivers/platform/x86/intel_mid_powerbtn.c
+++ b/drivers/platform/x86/intel_mid_powerbtn.c
@@ -94,6 +94,7 @@ static irqreturn_t mid_pb_isr(int irq, void *dev_id)
                input_sync(input);
        }
 
+       ddata->ack(ddata);
        return IRQ_HANDLED;
 }