/* Link the private data with the MTD structure */
au1550_mtd->priv = this;
+ au1550_mtd->owner = THIS_MODULE;
/* disable interrupts */
au_writel(au_readl(MEM_STNDCTL) & ~(1 << 8), MEM_STNDCTL);
/* Link the private data with the MTD structure */
autcpu12_mtd->priv = this;
+ autcpu12_mtd->owner = THIS_MODULE;
/* Set address of NAND IO lines */
this->IO_ADDR_R = autcpu12_fio_base;
/* Link the private data with the MTD structure */
new_mtd->priv = this;
+ new_mtd->owner = THIS_MODULE;
/* map physical address */
this->IO_ADDR_R = this->IO_ADDR_W = ioremap(adr, 4096);
goto out_ior;
}
- new_mtd->owner = THIS_MODULE;
cs553x_mtd[cs] = new_mtd;
goto out;
/* Link the private data with the MTD structure */
ep7312_mtd->priv = this;
+ ep7312_mtd->owner = THIS_MODULE;
/*
* Set GPIO Port B control register so that the pins are configured
/* Link the private data with the MTD structure */
h1910_nand_mtd->priv = this;
+ h1910_nand_mtd->owner = THIS_MODULE;
/*
* Enable VPEN
*
*/
+#include <linux/module.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/sched.h>
* @mtd: MTD device structure
* @maxchips: Number of chips to scan for
*
- * This fills out all the not initialized function pointers
+ * This fills out all the uninitialized function pointers
* with the defaults.
* The flash ID is read and the mtd/chip structures are
* filled with the appropriate values. Buffers are allocated if
* they are not provided by the board driver
+ * The mtd->owner field must be set to the module of the caller
*
*/
int nand_scan(struct mtd_info *mtd, int maxchips)
int i, nand_maf_id, nand_dev_id, busw, maf_id;
struct nand_chip *this = mtd->priv;
+ /* module_text_address() isn't exported. But if _this_ is a module,
+ it's a fairly safe bet that its caller is a module too... and
+ that means the call to module_text_address() gets optimised out
+ without having to resort to ifdefs */
+ if (!mtd->owner && (THIS_MODULE ||
+ module_text_address((unsigned long)__builtin_return_address(0)))) {
+ printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n");
+ BUG();
+ }
+
/* Get buswidth to select the correct functions */
busw = this->options & NAND_BUSWIDTH_16;
/* and make the autooob the default one */
memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
- mtd->owner = THIS_MODULE;
-
/* Check, if we should skip the bad block table scan */
if (this->options & NAND_SKIP_BBTSCAN)
return 0;
chip->options |= NAND_BUSWIDTH_16;
}
+ nsmtd->owner = THIS_MODULE;
+
if ((retval = nand_scan(nsmtd, 1)) != 0) {
NS_ERR("can't register NAND Simulator\n");
if (retval > 0)
/* Link the private data with the MTD structure */
ppchameleon_mtd->priv = this;
+ ppchameleon_mtd->owner = THIS_MODULE;
/* Initialize GPIOs */
/* Pin mapping for NAND chip */
/* Link the private data with the MTD structure */
rtc_from4_mtd->priv = this;
+ rtc_from4_mtd->owner = THIS_MODULE;
/* set area 5 as PCMCIA mode to clear the spec of tDH(Data hold time;9ns min) */
bcr1 = *SH77X9_BCR1 & ~0x0002;
nmtd->info = info;
nmtd->mtd.priv = chip;
+ nmtd->mtd.owner = THIS_MODULE;
nmtd->set = set;
if (hardware_ecc) {
/* Link the private data with the MTD structure */
sharpsl_mtd->priv = this;
+ sharpsl_mtd->owner = THIS_MODULE;
/*
* PXA initialize
/* Link the private data with the MTD structure */
spia_mtd->priv = this;
+ spia_mtd->owner = THIS_MODULE;
/*
* Set GPIO Port E control register so that the pins are configured
/* Link the private data with the MTD structure */
toto_mtd->priv = this;
+ toto_mtd->owner = THIS_MODULE;
/* Set address of NAND IO lines */
this->IO_ADDR_R = toto_io_base;
/* Link the private data with the MTD structure */
ts7250_mtd->priv = this;
+ ts7250_mtd->owner = THIS_MODULE;
/* insert callbacks */
this->IO_ADDR_R = (void *)TS72XX_NAND_DATA_VIRT_BASE;