ARM: dts: stm32: add DMA1, DMA2 and DMAMUX1 on STM32MP13x SoC family

DMA1 and DMA2 on STM32MP13x SoCs are the same than on STM32MP15x SoCs: they
offer up to 8 channels and request lines are routed through DMAMUX1.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index a1efb54..97aa173 100644 (file)
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -115,6 +115,50 @@
                        status = "disabled";
                };
 
+               dma1: dma-controller@48000000 {
+                       compatible = "st,stm32-dma";
+                       reg = <0x48000000 0x400>;
+                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_pclk4>;
+                       #dma-cells = <4>;
+                       st,mem2mem;
+                       dma-requests = <8>;
+               };
+
+               dma2: dma-controller@48001000 {
+                       compatible = "st,stm32-dma";
+                       reg = <0x48001000 0x400>;
+                       interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_pclk4>;
+                       #dma-cells = <4>;
+                       st,mem2mem;
+                       dma-requests = <8>;
+               };
+
+               dmamux1: dma-router@48002000 {
+                       compatible = "st,stm32h7-dmamux";
+                       reg = <0x48002000 0x40>;
+                       clocks = <&clk_pclk4>;
+                       #dma-cells = <3>;
+                       dma-masters = <&dma1 &dma2>;
+                       dma-requests = <128>;
+                       dma-channels = <16>;
+               };
+
                syscfg: syscon@50020000 {
                        compatible = "st,stm32mp157-syscfg", "syscon";
                        reg = <0x50020000 0x400>;