drm/amdgpu: Use the right function for hdp flush

[ Upstream commit c235a7132258ac30bd43d228222986022d21f5de ]

There are a few prechecks made before HDP flush like a flush is not
required on APU bare metal. Using hdp callback directly bypasses those
checks. Use amdgpu_device_flush_hdp which takes care of prechecks.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 1d9bff4cf8c53d33ee2ff1b11574e5da739ce61c)
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 45ed97038df0c8a53b9c6f8a6cf9970b3b7b3eb1..24d711b0e6346c1e742d9854f80ee1d10ed115d7 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -5998,7 +5998,7 @@ static int gfx_v10_0_cp_gfx_load_pfp_microcode(struct amdgpu_device *adev)
        }
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_CNTL);
        tmp = REG_SET_FIELD(tmp, CP_PFP_IC_BASE_CNTL, VMID, 0);
@@ -6076,7 +6076,7 @@ static int gfx_v10_0_cp_gfx_load_ce_microcode(struct amdgpu_device *adev)
        }
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_CNTL);
        tmp = REG_SET_FIELD(tmp, CP_CE_IC_BASE_CNTL, VMID, 0);
@@ -6153,7 +6153,7 @@ static int gfx_v10_0_cp_gfx_load_me_microcode(struct amdgpu_device *adev)
        }
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_CNTL);
        tmp = REG_SET_FIELD(tmp, CP_ME_IC_BASE_CNTL, VMID, 0);
@@ -6528,7 +6528,7 @@ static int gfx_v10_0_cp_compute_load_microcode(struct amdgpu_device *adev)
        }
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL);
        tmp = REG_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, CACHE_POLICY, 0);

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 84cf5fd297b7f67e8a8628de4166dd2b43f440f3..0357fea8ae1dff7acb5fde53fccf4873aa3b76aa 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -2327,7 +2327,7 @@ static int gfx_v11_0_config_me_cache(struct amdgpu_device *adev, uint64_t addr)
        }
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL);
        tmp = REG_SET_FIELD(tmp, CP_ME_IC_BASE_CNTL, VMID, 0);
@@ -2371,7 +2371,7 @@ static int gfx_v11_0_config_pfp_cache(struct amdgpu_device *adev, uint64_t addr)
        }
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL);
        tmp = REG_SET_FIELD(tmp, CP_PFP_IC_BASE_CNTL, VMID, 0);
@@ -2416,7 +2416,7 @@ static int gfx_v11_0_config_mec_cache(struct amdgpu_device *adev, uint64_t addr)
        }
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL);
        tmp = REG_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, CACHE_POLICY, 0);
@@ -3051,7 +3051,7 @@ static int gfx_v11_0_cp_gfx_load_pfp_microcode_rs64(struct amdgpu_device *adev)
        amdgpu_bo_unreserve(adev->gfx.pfp.pfp_fw_data_obj);
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,
                lower_32_bits(adev->gfx.pfp.pfp_fw_gpu_addr));
@@ -3269,7 +3269,7 @@ static int gfx_v11_0_cp_gfx_load_me_microcode_rs64(struct amdgpu_device *adev)
        amdgpu_bo_unreserve(adev->gfx.me.me_fw_data_obj);
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,
                lower_32_bits(adev->gfx.me.me_fw_gpu_addr));
@@ -4487,7 +4487,7 @@ static int gfx_v11_0_gfxhub_enable(struct amdgpu_device *adev)
        if (r)
                return r;
 
-       adev->hdp.funcs->flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?
                false : true;

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index b259e217930c7503fcb343cf921830be71d0d281..241619ee10e4be2755e7006f11fa177f64e11f5e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -2264,7 +2264,7 @@ static int gfx_v12_0_cp_gfx_load_pfp_microcode_rs64(struct amdgpu_device *adev)
        amdgpu_bo_unreserve(adev->gfx.pfp.pfp_fw_data_obj);
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,
                lower_32_bits(adev->gfx.pfp.pfp_fw_gpu_addr));
@@ -2408,7 +2408,7 @@ static int gfx_v12_0_cp_gfx_load_me_microcode_rs64(struct amdgpu_device *adev)
        amdgpu_bo_unreserve(adev->gfx.me.me_fw_data_obj);
 
        if (amdgpu_emu_mode == 1)
-               adev->hdp.funcs->flush_hdp(adev, NULL);
+               amdgpu_device_flush_hdp(adev, NULL);
 
        WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,
                lower_32_bits(adev->gfx.me.me_fw_gpu_addr));
@@ -3429,7 +3429,7 @@ static int gfx_v12_0_gfxhub_enable(struct amdgpu_device *adev)
        if (r)
                return r;
 
-       adev->hdp.funcs->flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?
                false : true;

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 9784a28921853ffe4aaa13615ef9c8dd19b1fa63..c6e742921282760f7317be7a8f17ce1eec467f69 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -265,7 +265,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
        ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;
 
        /* flush hdp cache */
-       adev->hdp.funcs->flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        /* This is necessary for SRIOV as well as for GFXOFF to function
         * properly under bare metal
@@ -966,7 +966,7 @@ static int gmc_v10_0_gart_enable(struct amdgpu_device *adev)
        adev->hdp.funcs->init_registers(adev);
 
        /* Flush HDP after it is initialized */
-       adev->hdp.funcs->flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?
                false : true;

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 2797fd84432b22d6ded588a047f40219187a282a..4e9c23d65b02ff8eaefb049de34b15140744a7a2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -226,7 +226,7 @@ static void gmc_v11_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
        ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;
 
        /* flush hdp cache */
-       adev->hdp.funcs->flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        /* This is necessary for SRIOV as well as for GFXOFF to function
         * properly under bare metal
@@ -893,7 +893,7 @@ static int gmc_v11_0_gart_enable(struct amdgpu_device *adev)
                return r;
 
        /* Flush HDP after it is initialized */
-       adev->hdp.funcs->flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?
                false : true;

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index 60acf676000b34fb566383f68705488f26c16c52..525e435ee22d8e913d8adaeb810fb5ac5ba9fd7e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
@@ -294,7 +294,7 @@ static void gmc_v12_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
                return;
 
        /* flush hdp cache */
-       adev->hdp.funcs->flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        /* This is necessary for SRIOV as well as for GFXOFF to function
         * properly under bare metal
@@ -862,7 +862,7 @@ static int gmc_v12_0_gart_enable(struct amdgpu_device *adev)
                return r;
 
        /* Flush HDP after it is initialized */
-       adev->hdp.funcs->flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?
                false : true;

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 7a45f3fdc73410c8a3c2ef84a6d759dc82a3e13c..9a212413c6d3a612e4f032a6c5ae233afe706d5a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -2351,7 +2351,7 @@ static int gmc_v9_0_hw_init(void *handle)
        adev->hdp.funcs->init_registers(adev);
 
        /* After HDP is initialized, flush HDP.*/
-       adev->hdp.funcs->flush_hdp(adev, NULL);
+       amdgpu_device_flush_hdp(adev, NULL);
 
        if (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS)
                value = false;

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 2395f1856962ad02a209bbf9e695bdfb96c07ef8..e77a467af7ac313ebf87cddcbfd2e5052f546b35 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
@@ -532,7 +532,7 @@ static int psp_v11_0_memory_training(struct psp_context *psp, uint32_t ops)
                        }
 
                        memcpy_toio(adev->mman.aper_base_kaddr, buf, sz);
-                       adev->hdp.funcs->flush_hdp(adev, NULL);
+                       amdgpu_device_flush_hdp(adev, NULL);
                        vfree(buf);
                        drm_dev_exit(idx);
                } else {

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
index 51e470e8d67d9e06648a17c289b5093e6bc2cb72..bf00de763acb0e79c2033b217e9519d1dc172597 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
@@ -600,7 +600,7 @@ static int psp_v13_0_memory_training(struct psp_context *psp, uint32_t ops)
                        }
 
                        memcpy_toio(adev->mman.aper_base_kaddr, buf, sz);
-                       adev->hdp.funcs->flush_hdp(adev, NULL);
+                       amdgpu_device_flush_hdp(adev, NULL);
                        vfree(buf);
                        drm_dev_exit(idx);
                } else {

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c
index 4d33c95a511631c091e26d05e489ba7f1bca2735..89f6c06946c51b0c46da57e58c3b505af8714e17 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c
@@ -488,7 +488,7 @@ static int psp_v14_0_memory_training(struct psp_context *psp, uint32_t ops)
                        }
 
                        memcpy_toio(adev->mman.aper_base_kaddr, buf, sz);
-                       adev->hdp.funcs->flush_hdp(adev, NULL);
+                       amdgpu_device_flush_hdp(adev, NULL);
                        vfree(buf);
                        drm_dev_exit(idx);
                } else {