clk: renesas: r8a779{5|6|65}: Add TPU clock
authorCao Van Dong <cv-dong@jinso.co.jp>
Thu, 25 Apr 2019 01:25:13 +0000 (10:25 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 21 May 2019 08:41:31 +0000 (10:41 +0200)
This patch adds the TPU clock on the R-Car r8a7795/r8a7796/r8a77965
SoCs.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7795-cpg-mssr.c
drivers/clk/renesas/r8a7796-cpg-mssr.c
drivers/clk/renesas/r8a77965-cpg-mssr.c

index 9e9a6f2..28522c1 100644 (file)
@@ -138,6 +138,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
        DEF_MOD("cmt2",                  301,   R8A7795_CLK_R),
        DEF_MOD("cmt1",                  302,   R8A7795_CLK_R),
        DEF_MOD("cmt0",                  303,   R8A7795_CLK_R),
+       DEF_MOD("tpu0",                  304,   R8A7795_CLK_S3D4),
        DEF_MOD("scif2",                 310,   R8A7795_CLK_S3D4),
        DEF_MOD("sdif3",                 311,   R8A7795_CLK_SD3),
        DEF_MOD("sdif2",                 312,   R8A7795_CLK_SD2),
index d8e9af5..e4f5db4 100644 (file)
@@ -134,6 +134,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
        DEF_MOD("cmt2",                  301,   R8A7796_CLK_R),
        DEF_MOD("cmt1",                  302,   R8A7796_CLK_R),
        DEF_MOD("cmt0",                  303,   R8A7796_CLK_R),
+       DEF_MOD("tpu0",                  304,   R8A7796_CLK_S3D4),
        DEF_MOD("scif2",                 310,   R8A7796_CLK_S3D4),
        DEF_MOD("sdif3",                 311,   R8A7796_CLK_SD3),
        DEF_MOD("sdif2",                 312,   R8A7796_CLK_SD2),
index 8f87e31..46d5a50 100644 (file)
@@ -132,6 +132,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
        DEF_MOD("cmt2",                 301,    R8A77965_CLK_R),
        DEF_MOD("cmt1",                 302,    R8A77965_CLK_R),
        DEF_MOD("cmt0",                 303,    R8A77965_CLK_R),
+       DEF_MOD("tpu0",                 304,    R8A77965_CLK_S3D4),
        DEF_MOD("scif2",                310,    R8A77965_CLK_S3D4),
        DEF_MOD("sdif3",                311,    R8A77965_CLK_SD3),
        DEF_MOD("sdif2",                312,    R8A77965_CLK_SD2),