re PR rtl-optimization/89865 (FAIL: gcc.target/i386/pr49095.c scan-assembler-times...

	PR rtl-optimization/89865
	* gcc.target/i386/pr49095.c: Include in scan-assembler-times patterns
	the first argument register, so that occassional spills/fills are
	ignored.

From-SVN: r270025

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index aee3078..542f4ee 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,10 @@
 2019-03-29  Jakub Jelinek  <jakub@redhat.com>
 
+       PR rtl-optimization/89865
+       * gcc.target/i386/pr49095.c: Include in scan-assembler-times patterns
+       the first argument register, so that occassional spills/fills are
+       ignored.
+
        PR sanitizer/89869
        * g++.dg/ubsan/vptr-14.C: New test.
 

diff --git a/gcc/testsuite/gcc.target/i386/pr49095.c b/gcc/testsuite/gcc.target/i386/pr49095.c
index 20175e7..177e4ce 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr49095.c
+++ b/gcc/testsuite/gcc.target/i386/pr49095.c
@@ -73,5 +73,5 @@ G (long)
 /* { dg-final { scan-assembler-not "test\[lq\]" } } */
 /* The {f,h}{char,short,int,long}xor functions aren't optimized into
    a RMW instruction, so need load, modify and store.  FIXME eventually.  */
-/* { dg-final { scan-assembler-times "\\), %" 57 { target { ia32 } } } } */
-/* { dg-final { scan-assembler-times "\\), %" 45 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\\(%eax\\), %" 12 { target { ia32 } } } } */
+/* { dg-final { scan-assembler-times "\\(%\[re\]di\\), %" 8 { target { ! ia32 } } } } */