This patch changes the macro definitions to match the C99
formating. This improves the readability.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
}
static struct ArcProto capmode_proto = {
- 'r',
- XMTU,
- 0,
- rx,
- build_header,
- prepare_tx,
- NULL,
- ack_tx
+ .suffix = 'r',
+ .mtu = XMTU,
+ .rx = rx,
+ .build_header = build_header,
+ .prepare_tx = prepare_tx,
+ .ack_tx = ack_tx
};
static void arcnet_cap_init(void)
.name = "ARC-PCI",
.devcount = 1,
.chan_map_tbl = {
- { 2, 0x00, 0x08 },
+ {
+ .bar = 2,
+ .offset = 0x00,
+ .size = 0x08,
+ },
},
.flags = ARC_CAN_10MBIT,
};
.name = "ARC-PCI",
.devcount = 1,
.chan_map_tbl = {
- { 2, 0x00, 0x08 },
+ {
+ .bar = 2,
+ .offset = 0x00,
+ .size = 0x08,
+ },
},
.flags = ARC_IS_5MBIT,
};
.devcount = 1,
/* SOHARD needs PCI base addr 4 */
.chan_map_tbl = {
- {4, 0x00, 0x08},
+ {
+ .bar = 4,
+ .offset = 0x00,
+ .size = 0x08
+ },
},
.flags = ARC_CAN_10MBIT,
};
.name = "EAE PLX-PCI ARC1",
.devcount = 1,
.chan_map_tbl = {
- { 2, 0x00, 0x08 },
+ {
+ .bar = 2,
+ .offset = 0x00,
+ .size = 0x08,
+ },
},
.flags = ARC_CAN_10MBIT,
};
.name = "EAE PLX-PCI MA1",
.devcount = 2,
.chan_map_tbl = {
- { 2, 0x00, 0x08 },
- { 2, 0x08, 0x08 }
+ {
+ .bar = 2,
+ .offset = 0x00,
+ .size = 0x08,
+ }, {
+ .bar = 2,
+ .offset = 0x08,
+ .size = 0x08,
+ }
},
.flags = ARC_CAN_10MBIT,
};