mtd: spi-nor: Add the SNOR_F_4B_OPCODES flag

Some flash_info entries have the SPI_NOR_4B_OPCODES flag set to let the
core know that the flash supports 4B opcode. While this solution works
fine for id-based caps detection, it doesn't work that well when relying
on SFDP-based caps detection. Let's add an SNOR_F_4B_OPCODES flag so
that the SFDP parsing code can set it when appropriate.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 1423bba..320264d 100644 (file)
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -3365,6 +3365,7 @@ static int spi_nor_init_params(struct spi_nor *nor,
 
                if (spi_nor_parse_sfdp(nor, &sfdp_params)) {
                        nor->addr_width = 0;
+                       nor->flags &= ~SNOR_F_4B_OPCODES;
                        /* restore previous erase map */
                        memcpy(&nor->erase_map, &prev_map,
                               sizeof(nor->erase_map));
@@ -3665,9 +3666,7 @@ static int spi_nor_init(struct spi_nor *nor)
                }
        }
 
-       if ((nor->addr_width == 4) &&
-           (JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) &&
-           !(nor->info->flags & SPI_NOR_4B_OPCODES)) {
+       if (nor->addr_width == 4 && !(nor->flags & SNOR_F_4B_OPCODES)) {
                /*
                 * If the RESET# pin isn't hooked up properly, or the system
                 * otherwise doesn't perform a reset command in the boot
@@ -3699,10 +3698,8 @@ static void spi_nor_resume(struct mtd_info *mtd)
 void spi_nor_restore(struct spi_nor *nor)
 {
        /* restore the addressing mode */
-       if ((nor->addr_width == 4) &&
-           (JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) &&
-           !(nor->info->flags & SPI_NOR_4B_OPCODES) &&
-           (nor->flags & SNOR_F_BROKEN_RESET))
+       if (nor->addr_width == 4 && !(nor->flags & SNOR_F_4B_OPCODES) &&
+           nor->flags & SNOR_F_BROKEN_RESET)
                set_4byte(nor, nor->info, 0);
 }
 EXPORT_SYMBOL_GPL(spi_nor_restore);
@@ -3858,13 +3855,17 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
        } else if (mtd->size > 0x1000000) {
                /* enable 4-byte addressing if the device exceeds 16MiB */
                nor->addr_width = 4;
-               if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
-                   info->flags & SPI_NOR_4B_OPCODES)
-                       spi_nor_set_4byte_opcodes(nor, info);
        } else {
                nor->addr_width = 3;
        }
 
+       if (info->flags & SPI_NOR_4B_OPCODES ||
+           (JEDEC_MFR(info) == SNOR_MFR_SPANSION && mtd->size > SZ_16M))
+               nor->flags |= SNOR_F_4B_OPCODES;
+
+       if (nor->addr_width == 4 && nor->flags & SNOR_F_4B_OPCODES)
+               spi_nor_set_4byte_opcodes(nor, info);
+
        if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
                dev_err(dev, "address width is too large: %u\n",
                        nor->addr_width);

diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 8b1acf6..981d628 100644 (file)
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -237,6 +237,7 @@ enum spi_nor_option_flags {
        SNOR_F_READY_XSR_RDY    = BIT(4),
        SNOR_F_USE_CLSR         = BIT(5),
        SNOR_F_BROKEN_RESET     = BIT(6),
+       SNOR_F_4B_OPCODES       = BIT(7),
 };
 
 /**