ARM: dts: stm32: Add Ethernet support on stm32h7 SOC and activate it for eval and...

Synopsys GMAC 4.10 is used. And Phy mode for eval and disco is RMII
with PHY SMSC LAN8742

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
index 24be8e6..980b276 100644 (file)
--- a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
@@ -173,6 +173,21 @@
                                };
                        };
 
+                       ethernet_rmii: rmii@0 {
+                               pins {
+                                       pinmux = <STM32_PINMUX('G', 11, AF11)>,
+                                                <STM32_PINMUX('G', 13, AF11)>,
+                                                <STM32_PINMUX('G', 12, AF11)>,
+                                                <STM32_PINMUX('C', 4, AF11)>,
+                                                <STM32_PINMUX('C', 5, AF11)>,
+                                                <STM32_PINMUX('A', 7, AF11)>,
+                                                <STM32_PINMUX('C', 1, AF11)>,
+                                                <STM32_PINMUX('A', 2, AF11)>,
+                                                <STM32_PINMUX('A', 1, AF11)>;
+                                       slew-rate = <2>;
+                               };
+                       };
+
                        usart1_pins: usart1@0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */

diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index cbdd69c..e103b29 100644 (file)
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -511,6 +511,19 @@
                                status = "disabled";
                        };
                };
+
+               mac: ethernet@40028000 {
+                       compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
+                       reg = <0x40028000 0x8000>;
+                       reg-names = "stmmaceth";
+                       interrupts = <61>;
+                       interrupt-names = "macirq";
+                       clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
+                       clocks = <&rcc ETH1MAC_CK>, <&rcc ETH1TX_CK>, <&rcc ETH1RX_CK>;
+                       st,syscon = <&syscfg 0x4>;
+                       snps,pbl = <8>;
+                       status = "disabled";
+               };
        };
 };
 

diff --git a/arch/arm/boot/dts/stm32h743i-disco.dts b/arch/arm/boot/dts/stm32h743i-disco.dts
index 45e088c..83ef63d 100644 (file)
--- a/arch/arm/boot/dts/stm32h743i-disco.dts
+++ b/arch/arm/boot/dts/stm32h743i-disco.dts
@@ -66,6 +66,23 @@
        clock-frequency = <25000000>;
 };
 
+&mac {
+       status = "disabled";
+       pinctrl-0       = <&ethernet_rmii>;
+       pinctrl-names   = "default";
+       phy-mode        = "rmii";
+       phy-handle      = <&phy0>;
+
+       mdio0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+               phy0: ethernet-phy@0 {
+                       reg = <0>;
+               };
+       };
+};
+
 &usart2 {
        pinctrl-0 = <&usart2_pins>;
        pinctrl-names = "default";

diff --git a/arch/arm/boot/dts/stm32h743i-eval.dts b/arch/arm/boot/dts/stm32h743i-eval.dts
index 3f8e0c4..383c5bb 100644 (file)
--- a/arch/arm/boot/dts/stm32h743i-eval.dts
+++ b/arch/arm/boot/dts/stm32h743i-eval.dts
@@ -104,6 +104,23 @@
        status = "okay";
 };
 
+&mac {
+       status = "disabled";
+       pinctrl-0       = <&ethernet_rmii>;
+       pinctrl-names   = "default";
+       phy-mode        = "rmii";
+       phy-handle      = <&phy0>;
+
+       mdio0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+               phy0: ethernet-phy@0 {
+                       reg = <0>;
+               };
+       };
+};
+
 &usart1 {
        pinctrl-0 = <&usart1_pins>;
        pinctrl-names = "default";