A minor change for an obvous problem caused by r188451:

        def imm0_63 : Operand<i32>, ImmLeaf<i32, [{ return Imm >= 0 && Imm < 63;}]>{
As it seems Imm <63 should be Imm <= 63. ImmLeaf is used in pattern match, but there is already a function check the shift amount range, so just remove ImmLeaf. Also add a test to check 63.

llvm-svn: 188911

diff --git a/llvm/lib/Target/AArch64/AArch64InstrNEON.td b/llvm/lib/Target/AArch64/AArch64InstrNEON.td
index 175c3aa..fb6d654 100644 (file)
--- a/llvm/lib/Target/AArch64/AArch64InstrNEON.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrNEON.td
@@ -1414,7 +1414,7 @@ def FMOVvi_2D : NeonI_FMOV_impl<".2d", VPR128, v2f64, fmov64_operand, 0b1, 0b1>;
 
 // Vector Shift (Immediate) 
 
-def imm0_63 : Operand<i32>, ImmLeaf<i32, [{ return Imm >= 0 && Imm < 63; }]> {
+def imm0_63 : Operand<i32> {
   let ParserMatchClass = uimm6_asmoperand;
 }
 

diff --git a/llvm/test/CodeGen/AArch64/neon-shift.ll b/llvm/test/CodeGen/AArch64/neon-shift.ll
index 9b11ba8..1b8b941 100644 (file)
--- a/llvm/test/CodeGen/AArch64/neon-shift.ll
+++ b/llvm/test/CodeGen/AArch64/neon-shift.ll
@@ -181,8 +181,8 @@ define <4 x i32> @test_shl_v4i32(<4 x i32> %a) {
 
 define <2 x i64> @test_shl_v2i64(<2 x i64> %a) {
 ; CHECK: test_shl_v2i64:
-; CHECK: shl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #3
-  %tmp = shl <2 x i64> %a, <i64 3, i64 3>
+; CHECK: shl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #63
+  %tmp = shl <2 x i64> %a, <i64 63, i64 63>
   ret <2 x i64> %tmp
 }