mtd: spi-nor: Introduce spi_nor_init_flags()

Used to initialize the NOR flags for settings that are not defined
in the JESD216 SFDP standard, thus can not be retrieved when parsing
SFDP.
This moves the setting of SNOR_F_READY_XSR_RDY and SNOR_F_HAS_LOCK
late in the init call, without any functional change expected.
The rest of the flags were already set after the spi_nor_init_params().

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20211207140254.87681-8-tudor.ambarus@microchip.com

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 25e2b48..1ac7e8d 100644 (file)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2644,6 +2644,55 @@ static void spi_nor_info_init_params(struct spi_nor *nor)
 }
 
 /**
+ * spi_nor_init_flags() - Initialize NOR flags for settings that are not defined
+ * in the JESD216 SFDP standard, thus can not be retrieved when parsing SFDP.
+ * @nor:       pointer to a 'struct spi_nor'
+ */
+static void spi_nor_init_flags(struct spi_nor *nor)
+{
+       struct device_node *np = spi_nor_get_flash_node(nor);
+       const u16 flags = nor->info->flags;
+
+       if (of_property_read_bool(np, "broken-flash-reset"))
+               nor->flags |= SNOR_F_BROKEN_RESET;
+
+       if (flags & SPI_NOR_SWP_IS_VOLATILE)
+               nor->flags |= SNOR_F_SWP_IS_VOLATILE;
+
+       if (flags & SPI_NOR_HAS_LOCK)
+               nor->flags |= SNOR_F_HAS_LOCK;
+
+       if (flags & SPI_NOR_HAS_TB) {
+               nor->flags |= SNOR_F_HAS_SR_TB;
+               if (flags & SPI_NOR_TB_SR_BIT6)
+                       nor->flags |= SNOR_F_HAS_SR_TB_BIT6;
+       }
+
+       if (flags & SPI_NOR_4BIT_BP) {
+               nor->flags |= SNOR_F_HAS_4BIT_BP;
+               if (flags & SPI_NOR_BP3_SR_BIT6)
+                       nor->flags |= SNOR_F_HAS_SR_BP3_BIT6;
+       }
+
+       if (flags & NO_CHIP_ERASE)
+               nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
+
+       if (flags & USE_CLSR)
+               nor->flags |= SNOR_F_USE_CLSR;
+
+       if (flags & USE_FSR)
+               nor->flags |= SNOR_F_USE_FSR;
+
+       /*
+        * Make sure the XSR_RDY flag is set before calling
+        * spi_nor_wait_till_ready(). Xilinx S3AN share MFR
+        * with Atmel SPI NOR.
+        */
+       if (flags & SPI_NOR_XSR_RDY)
+               nor->flags |=  SNOR_F_READY_XSR_RDY;
+}
+
+/**
  * spi_nor_late_init_params() - Late initialization of default flash parameters.
  * @nor:       pointer to a 'struct spi_nor'
  *
@@ -2660,6 +2709,8 @@ static void spi_nor_late_init_params(struct spi_nor *nor)
        if (nor->info->fixups && nor->info->fixups->late_init)
                nor->info->fixups->late_init(nor);
 
+       spi_nor_init_flags(nor);
+
        /*
         * NOR protection support. When locking_ops are not provided, we pick
         * the default ones.
@@ -3094,10 +3145,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
        const struct flash_info *info;
        struct device *dev = nor->dev;
        struct mtd_info *mtd = &nor->mtd;
-       struct device_node *np = spi_nor_get_flash_node(nor);
        int ret;
        int i;
-       u16 flags;
        u8 fixup_flags;
 
        ret = spi_nor_check(nor);
@@ -3128,52 +3177,16 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
                return PTR_ERR(info);
 
        nor->info = info;
-       flags = info->flags;
 
        spi_nor_debugfs_init(nor, info);
 
        mutex_init(&nor->lock);
 
-       /*
-        * Make sure the XSR_RDY flag is set before calling
-        * spi_nor_wait_till_ready(). Xilinx S3AN share MFR
-        * with Atmel SPI NOR.
-        */
-       if (flags & SPI_NOR_XSR_RDY)
-               nor->flags |=  SNOR_F_READY_XSR_RDY;
-
-       if (flags & SPI_NOR_HAS_LOCK)
-               nor->flags |= SNOR_F_HAS_LOCK;
-
        /* Init flash parameters based on flash_info struct and SFDP */
        ret = spi_nor_init_params(nor);
        if (ret)
                return ret;
 
-       if (flags & USE_FSR)
-               nor->flags |= SNOR_F_USE_FSR;
-       if (flags & SPI_NOR_HAS_TB) {
-               nor->flags |= SNOR_F_HAS_SR_TB;
-               if (flags & SPI_NOR_TB_SR_BIT6)
-                       nor->flags |= SNOR_F_HAS_SR_TB_BIT6;
-       }
-
-       if (flags & NO_CHIP_ERASE)
-               nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
-       if (flags & USE_CLSR)
-               nor->flags |= SNOR_F_USE_CLSR;
-       if (flags & SPI_NOR_SWP_IS_VOLATILE)
-               nor->flags |= SNOR_F_SWP_IS_VOLATILE;
-
-       if (flags & SPI_NOR_4BIT_BP) {
-               nor->flags |= SNOR_F_HAS_4BIT_BP;
-               if (flags & SPI_NOR_BP3_SR_BIT6)
-                       nor->flags |= SNOR_F_HAS_SR_BP3_BIT6;
-       }
-
-       if (of_property_read_bool(np, "broken-flash-reset"))
-               nor->flags |= SNOR_F_BROKEN_RESET;
-
        /*
         * Configure the SPI memory:
         * - select op codes for (Fast) Read, Page Program and Sector Erase.