Remove function parameters from get{Src,Dst}Index since we can deduce it from the...

diff --git a/backend/src/backend/context.cpp b/backend/src/backend/context.cpp
index 485db5b..fe7512e 100644 (file)
--- a/backend/src/backend/context.cpp
+++ b/backend/src/backend/context.cpp
@@ -75,7 +75,7 @@ namespace gbe
     fn.foreachInstruction([&](const ir::Instruction &insn) {
       const uint32_t srcNum = insn.getSrcNum();
       for (uint32_t srcID = 0; srcID < srcNum; ++srcID) {
-        const ir::Register reg = insn.getSrcIndex(fn, srcID);
+        const ir::Register reg = insn.getSrcIndex(srcID);
         if (fn.isSpecialReg(reg) == false) continue;
 
         INSERT_REG(lsize0, LOCAL_SIZE_X)

diff --git a/backend/src/ir/instruction.cpp b/backend/src/ir/instruction.cpp
index fd04d5b..16432c3 100644 (file)
--- a/backend/src/ir/instruction.cpp
+++ b/backend/src/ir/instruction.cpp
@@ -739,10 +739,10 @@ namespace ir {
   };
 
   RegisterData Instruction::getDst(const Function &fn, uint32_t ID) const {
-    return fn.getRegisterData(this->getDstIndex(fn, ID));
+    return fn.getRegisterData(this->getDstIndex(ID));
   }
   RegisterData Instruction::getSrc(const Function &fn, uint32_t ID) const {
-    return fn.getRegisterData(this->getSrcIndex(fn, ID));
+    return fn.getRegisterData(this->getSrcIndex(ID));
   }
 
 #define DECL_INSN(OPCODE, CLASS)                                  \
@@ -846,22 +846,32 @@ START_FUNCTION(Instruction, uint32_t, getDstNum(void))
 END_FUNCTION(Instruction, uint32_t)
 #undef CALL
 
-#define CALL getDstIndex(fn, ID)
-START_FUNCTION(Instruction, Register, getDstIndex(const Function &fn, uint32_t ID))
+#define CALL wellFormed(fn, whyNot)
+START_FUNCTION(Instruction, bool, wellFormed(const Function &fn, std::string &whyNot))
 #include "ir/instruction.hxx"
-END_FUNCTION(Instruction, Register)
+END_FUNCTION(Instruction, bool)
 #undef CALL
 
-#define CALL getSrcIndex(fn, ID)
-START_FUNCTION(Instruction, Register, getSrcIndex(const Function &fn, uint32_t ID))
+#undef DECL_INSN
+
+#define DECL_INSN(OPCODE, CLASS)                                  \
+  case OP_##OPCODE:                                               \
+  {                                                               \
+    GBE_ASSERT(this->getParent() != NULL);                        \
+    const Function &fn = this->getParent()->getParent();          \
+    return reinterpret_cast<const internal::CLASS*>(this)->CALL;  \
+  }
+
+#define CALL getDstIndex(fn, ID)
+START_FUNCTION(Instruction, Register, getDstIndex(uint32_t ID))
 #include "ir/instruction.hxx"
 END_FUNCTION(Instruction, Register)
 #undef CALL
 
-#define CALL wellFormed(fn, whyNot)
-START_FUNCTION(Instruction, bool, wellFormed(const Function &fn, std::string &whyNot))
+#define CALL getSrcIndex(fn, ID)
+START_FUNCTION(Instruction, Register, getSrcIndex(uint32_t ID))
 #include "ir/instruction.hxx"
-END_FUNCTION(Instruction, bool)
+END_FUNCTION(Instruction, Register)
 #undef CALL
 
 #undef DECL_INSN

diff --git a/backend/src/ir/instruction.hpp b/backend/src/ir/instruction.hpp
index 6cde6ff..da7068f 100644 (file)
--- a/backend/src/ir/instruction.hpp
+++ b/backend/src/ir/instruction.hpp
@@ -88,9 +88,9 @@ namespace ir {
     /*! Get the number of destination for this instruction */
     uint32_t getDstNum(void) const;
     /*! Get the register index of the given source */
-    Register getSrcIndex(const Function &fn, uint32_t ID = 0u) const;
+    Register getSrcIndex(uint32_t ID = 0u) const;
     /*! Get the register index of the given destination */
-    Register getDstIndex(const Function &fn, uint32_t ID = 0u) const;
+    Register getDstIndex(uint32_t ID = 0u) const;
     /*! Get the register of the given source */
     RegisterData getDst(const Function &fn, uint32_t ID = 0u) const;
     /*! Get the register of the given destination */
@@ -258,7 +258,7 @@ namespace ir {
     /*! Return the predicate register index (if predicated) */
     Register getPredicateIndex(const Function &fn) const {
       GBE_ASSERTM(this->isPredicated() == true, "Branch is not predicated");
-      return this->getSrcIndex(fn, 0);
+      return this->getSrcIndex(0);
     }
     /*! Return the label index pointed by the branch */
     LabelIndex getLabelIndex(void) const;

diff --git a/backend/src/ir/liveness.cpp b/backend/src/ir/liveness.cpp
index 8e5b9ec..0a16406 100644 (file)
--- a/backend/src/ir/liveness.cpp
+++ b/backend/src/ir/liveness.cpp
@@ -52,17 +52,16 @@ namespace ir {
   void Liveness::initInstruction(BlockInfo &info, const Instruction &insn) {
     const uint32_t srcNum = insn.getSrcNum();
     const uint32_t dstNum = insn.getDstNum();
-    const Function &fn = info.bb.getParent();
     // First look for used before killed
     for (uint32_t srcID = 0; srcID < srcNum; ++srcID) {
-      const Register reg = insn.getSrcIndex(fn, srcID);
+      const Register reg = insn.getSrcIndex(srcID);
       // Not killed -> it is really an upward use
       if (info.varKill.contains(reg) == false)
         info.upwardUsed.insert(reg);
     }
     // A destination is a killed value
     for (uint32_t dstID = 0; dstID < dstNum; ++dstID) {
-      const Register reg = insn.getDstIndex(fn, dstID);
+      const Register reg = insn.getDstIndex(dstID);
       info.varKill.insert(reg);
     }
   }
@@ -111,7 +110,6 @@ namespace ir {
   /*! Compute the use of a register in all direction in a block */
   template <UsePosition pos>
   static INLINE uint32_t usage(const Instruction &insn, Register reg) {
-    const Function &fn = insn.getParent()->getParent();
     const Instruction *curr = &insn;
     uint32_t use = USE_NONE;
 
@@ -122,14 +120,14 @@ namespace ir {
       curr = curr->getSuccessor();
     while (curr) {
       for (uint32_t srcID = 0; srcID < curr->getSrcNum(); ++srcID) {
-        const Register src = curr->getSrcIndex(fn, srcID);
+        const Register src = curr->getSrcIndex(srcID);
         if (src == reg) {
           use |= USE_READ;
           break;
         }
       }
       for (uint32_t dstID = 0; dstID < curr->getDstNum(); ++dstID) {
-        const Register dst = curr->getDstIndex(fn, dstID);
+        const Register dst = curr->getDstIndex(dstID);
         if (dst == reg) {
           use |= USE_WRITTEN;
           break;

diff --git a/backend/src/ir/value.cpp b/backend/src/ir/value.cpp
index 8af56a9..2b99dc2 100644 (file)
--- a/backend/src/ir/value.cpp
+++ b/backend/src/ir/value.cpp
@@ -144,7 +144,7 @@ namespace ir {
       bb.rforeach([&](const Instruction &insn) {
         const uint32_t dstNum = insn.getDstNum();
         for (uint32_t dstID = 0; dstID < dstNum; ++dstID) {
-          const Register reg = insn.getDstIndex(fn, dstID);
+          const Register reg = insn.getDstIndex(dstID);
           // We only take the most recent definition
           if (defined.contains(reg) == true) continue;
           // Not in LiveOut, so does not matter
@@ -332,7 +332,7 @@ namespace ir {
         // Instruction sources consumes definitions
         const uint32_t srcNum = insn.getSrcNum();
         for (uint32_t srcID = 0; srcID < srcNum; ++srcID) {
-          const Register src = insn.getSrcIndex(fn, srcID);
+          const Register src = insn.getSrcIndex(srcID);
           const ValueUse use(&insn, srcID);
           auto ud = udGraph.find(use);
           GBE_ASSERT(ud != udGraph.end());
@@ -357,7 +357,7 @@ namespace ir {
         // Instruction destinations create new chains
         const uint32_t dstNum = insn.getDstNum();
         for (uint32_t dstID = 0; dstID < dstNum; ++dstID) {
-          const Register dst = insn.getDstIndex(fn, dstID);
+          const Register dst = insn.getDstIndex(dstID);
           ValueDef *def = (ValueDef *) this->getDefAddress(&insn, dstID);
           DefSet *udChain = this->newDefSet();
           udChain->insert(def);
@@ -527,7 +527,7 @@ namespace ir {
       const uint32_t dstNum = insn.getDstNum();
       if (dstNum > 0) out << "USES:" << std::endl;
       for (uint32_t dstID = 0; dstID < dstNum; ++dstID) {
-        const Register reg = insn.getDstIndex(fn, dstID);
+        const Register reg = insn.getDstIndex(dstID);
         const auto &uses = dag.getUse(&insn, dstID);
         for (auto it = uses.begin(); it != uses.end(); ++it) {
           const Instruction *other = (*it)->getInstruction();
@@ -539,7 +539,7 @@ namespace ir {
       const uint32_t srcNum = insn.getSrcNum();
       if (srcNum > 0) out << "DEFS:" << std::endl;
       for (uint32_t srcID = 0; srcID < srcNum; ++srcID) {
-        const Register reg = insn.getSrcIndex(fn, srcID);
+        const Register reg = insn.getSrcIndex(srcID);
         const auto &defs = dag.getDef(&insn, srcID);
         for (auto it = defs.begin(); it != defs.end(); ++it) {
           if ((*it)->getType() == ValueDef::DEF_FN_INPUT)

diff --git a/backend/src/ir/value.hpp b/backend/src/ir/value.hpp
index 9ed01bb..565f1d7 100644 (file)
--- a/backend/src/ir/value.hpp
+++ b/backend/src/ir/value.hpp
@@ -92,8 +92,7 @@ namespace ir {
       else if (type == DEF_FN_INPUT)
         return data.input->reg;
       else {
-        const Function &fn = data.insn->getParent()->getParent();
-        return data.insn->getDstIndex(fn, data.dstID);
+        return data.insn->getDstIndex(data.dstID);
       }
     }
 
@@ -153,7 +152,7 @@ namespace ir {
     uint32_t getSrcID(void) const { return srcID; }
     /*! Get the register for this use */
     Register getRegister(void) const {
-      return insn->getSrcIndex(insn->getParent()->getParent(), srcID);
+      return insn->getSrcIndex(srcID);
     }
   private:
     const Instruction *insn; //!< Instruction where the value is used