Initialize output buffer in fragment_shader_interlock tests

In discard tests, not all output elements are written by the shader.
Clear the output buffer to zero to match what the test expects. The
output image was already being cleared.

Components: Vulkan
VK-GL-CTS issue: 2004
Affects: dEQP-VK.fragment_shader_interlock.*

Change-Id: Ie1049765ec4b7187b39e3d46261e9abef9f5104d
(cherry picked from commit 7b1cb5b16f44bd9598a2bc4726e78f7c13c84ea7)

diff --git a/external/vulkancts/modules/vulkan/fragment_shader_interlock/vktFragmentShaderInterlockBasic.cpp b/external/vulkancts/modules/vulkan/fragment_shader_interlock/vktFragmentShaderInterlockBasic.cpp
index 9f530af..f280259 100644 (file)
--- a/external/vulkancts/modules/vulkan/fragment_shader_interlock/vktFragmentShaderInterlockBasic.cpp
+++ b/external/vulkancts/modules/vulkan/fragment_shader_interlock/vktFragmentShaderInterlockBasic.cpp
@@ -748,6 +748,8 @@ tcu::TestStatus FSITestInstance::iterate (void)
 
        vk.cmdClearColorImage(*cmdBuffer, **image, VK_IMAGE_LAYOUT_GENERAL, &clearColor.color, 1, &range);
 
+       vk.cmdFillBuffer(*cmdBuffer, **buffer, 0, bufferSize, 0);
+
        memBarrier.srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT;
        memBarrier.dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT;
        vk.cmdPipelineBarrier(*cmdBuffer, VK_PIPELINE_STAGE_TRANSFER_BIT, allPipelineStages,