tm2: emmc run hs200 busmode [1/1]
authorruixuan.li <ruixuan.li@amlogic.com>
Tue, 2 Apr 2019 03:11:56 +0000 (11:11 +0800)
committerJianxiong Pan <jianxiong.pan@amlogic.com>
Thu, 11 Apr 2019 03:12:43 +0000 (11:12 +0800)
PD#SWPL-5658

Problem:
emmc run high speed now

Solution:
modify dts

Verify:
passed on t962e2_ab319

Change-Id: Iedef30bed9547e7f57c883077462f1762c55fda3
Signed-off-by: ruixuan.li <ruixuan.li@amlogic.com>
arch/arm/boot/dts/amlogic/mesontm2.dtsi
arch/arm/boot/dts/amlogic/tm2_t962e2_ab311.dts
arch/arm/boot/dts/amlogic/tm2_t962e2_ab319.dts
arch/arm/boot/dts/amlogic/tm2_t962x3_ab309.dts
arch/arm64/boot/dts/amlogic/mesontm2.dtsi
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311.dts
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab319.dts
arch/arm64/boot/dts/amlogic/tm2_t962x3_ab309.dts
drivers/amlogic/clk/tl1/tl1_clk_sdemmc.c
drivers/amlogic/mmc/aml_sd_emmc_v3.c

index 7de85f0..36fcea2 100644 (file)
                           <&clkc CLKID_SD_EMMC_C_P0_COMP>,
                           <&clkc CLKID_FCLK_DIV2>,
                           <&clkc CLKID_FCLK_DIV2P5>,
-                          <&clkc CLKID_GP0_PLL>,
                           <&xtal>;
-               clock-names = "core","clkin0","clkin1","clkin2","clkin3","xtal";
+               clock-names = "core","clkin0","clkin1","clkin2","xtal";
 
                bus-width = <8>;
                cap-sd-highspeed;
index ec8f5fb..e9a2f58 100644 (file)
 
        sd_emmc_b: sdio@ffe05000 {
                status = "okay";
-               compatible = "amlogic, meson-mmc-tl1";
+               compatible = "amlogic, meson-mmc-tm2";
                reg = <0xffe05000 0x800>;
                interrupts = <0 190 4>;
 
 
 /*     sd_emmc_b: sd@ffe05000 {
  *             status = "okay";
- *             compatible = "amlogic, meson-mmc-tl1";
+ *             compatible = "amlogic, meson-mmc-tm2";
  *             reg = <0xffe05000 0x800>;
  *             interrupts = <0 190 1>;
  *
                         "MMC_CAP_1_8V_DDR",
                         "MMC_CAP_HW_RESET",
                         "MMC_CAP_ERASE",
-                        "MMC_CAP_CMD23",
-                        "MMC_CAP_DRIVER_TYPE_D";
-               //caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+                        "MMC_CAP_CMD23";
+               caps2 = "MMC_CAP2_HS200";
+               /* "MMC_CAP2_HS400";*/
                f_min = <400000>;
-               f_max = <50000000>;
+               f_max = <200000000>;
        };
 };
 
index 8dc663d..27b324d 100644 (file)
 
        sd_emmc_b: sd@ffe05000 {
                status = "okay";
-               compatible = "amlogic, meson-mmc-tl1";
+               compatible = "amlogic, meson-mmc-tm2";
                reg = <0xffe05000 0x800>;
                interrupts = <0 190 1>;
 
                         "MMC_CAP_MMC_HIGHSPEED",
                         "MMC_CAP_SD_HIGHSPEED",
                         "MMC_CAP_NONREMOVABLE",
-                        /*"MMC_CAP_1_8V_DDR",*/
+                        "MMC_CAP_1_8V_DDR",
                         "MMC_CAP_HW_RESET",
                         "MMC_CAP_ERASE",
                         "MMC_CAP_CMD23";
-               //caps2 = "MMC_CAP2_HS200";
+               caps2 = "MMC_CAP2_HS200";
                /* "MMC_CAP2_HS400";*/
                f_min = <400000>;
-               f_max = <50000000>;
+               f_max = <200000000>;
        };
 };
 
index b764d9e..da62b76 100644 (file)
 
        sd_emmc_b: sd@ffe05000 {
                status = "okay";
-               compatible = "amlogic, meson-mmc-tl1";
+               compatible = "amlogic, meson-mmc-tm2";
                reg = <0xffe05000 0x800>;
                interrupts = <0 190 1>;
 
index 8a5300d..1c9da7a 100644 (file)
                           <&clkc CLKID_SD_EMMC_C_P0_COMP>,
                           <&clkc CLKID_FCLK_DIV2>,
                           <&clkc CLKID_FCLK_DIV2P5>,
-                          <&clkc CLKID_GP0_PLL>,
                           <&xtal>;
-               clock-names = "core","clkin0","clkin1","clkin2","clkin3","xtal";
+               clock-names = "core","clkin0","clkin1","clkin2","xtal";
 
                bus-width = <8>;
                cap-sd-highspeed;
index f538435..67d9771 100644 (file)
 
        sd_emmc_b: sdio@ffe05000 {
                status = "okay";
-               compatible = "amlogic, meson-mmc-tl1";
+               compatible = "amlogic, meson-mmc-tm2";
                reg = <0x0 0xffe05000 0x0 0x800>;
                interrupts = <0 190 4>;
 
        };
 /*     sd_emmc_b: sd@ffe05000 {
  *             status = "okay";
- *             compatible = "amlogic, meson-mmc-tl1";
+ *             compatible = "amlogic, meson-mmc-tm2";
  *             reg = <0xffe05000 0x800>;
  *             interrupts = <0 190 1>;
  *
                         "MMC_CAP_1_8V_DDR",
                         "MMC_CAP_HW_RESET",
                         "MMC_CAP_ERASE",
-                        "MMC_CAP_CMD23",
-                        "MMC_CAP_DRIVER_TYPE_D";
-               //caps2 = "MMC_CAP2_HS200"; /* "MMC_CAP2_HS400";*/
+                        "MMC_CAP_CMD23";
+               caps2 = "MMC_CAP2_HS200";
+                /* "MMC_CAP2_HS400";*/
                f_min = <400000>;
-               f_max = <50000000>;
+               f_max = <200000000>;
        };
 };
 
index 4f37ef6..531694c 100644 (file)
@@ -18,7 +18,7 @@
 /dts-v1/;
 
 #include "mesontm2.dtsi"
-#include "partition_mbox_normal.dtsi"
+#include "partition_mbox_normal_P_32.dtsi"
 
 / {
        model = "Amlogic TM2 T962E2 AB319";
                         "MMC_CAP_MMC_HIGHSPEED",
                         "MMC_CAP_SD_HIGHSPEED",
                         "MMC_CAP_NONREMOVABLE",
-                        /*"MMC_CAP_1_8V_DDR",*/
+                        "MMC_CAP_1_8V_DDR",
                         "MMC_CAP_HW_RESET",
                         "MMC_CAP_ERASE",
                         "MMC_CAP_CMD23";
-               /*caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
+               caps2 = "MMC_CAP2_HS200";
+               /* "MMC_CAP2_HS400";*/
                f_min = <400000>;
-               f_max = <50000000>;
+               f_max = <200000000>;
        };
 };
 
index 50e8433..7746bfa 100644 (file)
 
        sd_emmc_b: sd@ffe05000 {
                status = "okay";
-               compatible = "amlogic, meson-mmc-tl1";
+               compatible = "amlogic, meson-mmc-tm2";
                reg = <0x0 0xffe05000 0x0 0x800>;
                interrupts = <0 190 1>;
 
index b5479b6..8ee3df8 100644 (file)
@@ -27,7 +27,7 @@
 #include "tl1.h"
 
 PNAME(sd_emmc_parent_names) = { "xtal", "fclk_div2",
-       "fclk_div3", "fclk_div5", "fclk_div7", "mpll2", "mpll3", "gp0_pll" };
+       "fclk_div3", "fclk_div5", "fclk_div2p5", "mpll2", "mpll3", "gp0_pll" };
 /*sd_emmc B*/
 static MUX(sd_emmc_p0_mux_B, HHI_SD_EMMC_CLK_CNTL, 0x7, 25,
 sd_emmc_parent_names, CLK_GET_RATE_NOCACHE | CLK_IGNORE_UNUSED);
index 51ab505..4f28b8c 100644 (file)
@@ -241,7 +241,7 @@ static int meson_mmc_clk_set_rate_v3(struct mmc_host *mmc,
                                        host->mux_parent[0]);
                        if (ret)
                                pr_warn("set comp0 as mux_clk parent error\n");
-               } else if (((host->data->chip_type == MMC_CHIP_TL1)
+               } else if (((host->data->chip_type >= MMC_CHIP_TL1)
                                || (host->data->chip_type == MMC_CHIP_G12B))
                                && (clk_ios >= 166000000)) {
                        src0_clk = devm_clk_get(host->dev, "clkin2");