configs: socfpga: Add CONFIG_SPL_PAD_TO
authorLey Foon Tan <ley.foon.tan@intel.com>
Tue, 22 Dec 2020 01:53:25 +0000 (09:53 +0800)
committerLey Foon Tan <ley.foon.tan@intel.com>
Fri, 15 Jan 2021 09:48:39 +0000 (17:48 +0800)
Add CONFIG_SPL_PAD_TO for Gen5 and Arria 10. CONFIG_SPL_PAD_TO is set to
size of OCRAM.

This is preparation for image padding change in socfpgaimage.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
include/configs/socfpga_common.h

index 3d71759..62b327c 100644 (file)
 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 #define CONFIG_SYS_INIT_RAM_ADDR       0xFFFF0000
 #define CONFIG_SYS_INIT_RAM_SIZE       SOCFPGA_PHYS_OCRAM_SIZE
+#define CONFIG_SPL_PAD_TO              0x10000
 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
 #define CONFIG_SYS_INIT_RAM_ADDR       0xFFE00000
+#define CONFIG_SPL_PAD_TO              0x40000
 /* SPL memory allocation configuration, this is for FAT implementation */
 #ifndef CONFIG_SYS_SPL_MALLOC_SIZE
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x10000