imx: imx6sx-sdb: Enable DM QSPI driver

To support DM QSPI driver
 - Add spi0 and spi1 alias for qspi1 and qspi2.
 - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
   to "spi-flash" and add "num-cs" property.
 - Enable DM SPI/QSPI relavent configurations
 - Remove iomux settings of qspi2 in board codes which is not needed
   for DM driver.
 - Add sf default settings. So running "sf probe" can detect the flash

Signed-off-by: Ye Li <ye.li@nxp.com>

diff --git a/arch/arm/dts/imx6sx-sdb-u-boot.dtsi b/arch/arm/dts/imx6sx-sdb-u-boot.dtsi
new file mode 100644 (file)
index 0000000..8e592cd
--- /dev/null
+++ b/arch/arm/dts/imx6sx-sdb-u-boot.dtsi
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+&qspi2 {
+       num-cs = <2>;
+
+       flash0: n25q256a@0 {
+               compatible = "spi-flash";
+       };
+
+       flash1: n25q256a@1 {
+               compatible = "spi-flash";
+       };
+};

diff --git a/arch/arm/dts/imx6sx.dtsi b/arch/arm/dts/imx6sx.dtsi
index 1a473e8..8ccf264 100644 (file)
--- a/arch/arm/dts/imx6sx.dtsi
+++ b/arch/arm/dts/imx6sx.dtsi
@@ -40,11 +40,13 @@
                serial3 = &uart4;
                serial4 = &uart5;
                serial5 = &uart6;
-               spi0 = &ecspi1;
-               spi1 = &ecspi2;
-               spi2 = &ecspi3;
-               spi3 = &ecspi4;
-               spi4 = &ecspi5;
+               spi0 = &qspi1;
+               spi1 = &qspi2;
+               spi2 = &ecspi1;
+               spi3 = &ecspi2;
+               spi4 = &ecspi3;
+               spi5 = &ecspi4;
+               spi6 = &ecspi5;
                usbphy0 = &usbphy1;
                usbphy1 = &usbphy2;
        };

diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index d56e235..3e10c7f 100644 (file)
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -205,33 +205,8 @@ int board_mmc_get_env_dev(int devno)
 
 #ifdef CONFIG_FSL_QSPI
 
-#define QSPI_PAD_CTRL1 \
-       (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_HIGH | \
-        PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_40ohm)
-
-static iomux_v3_cfg_t const quadspi_pads[] = {
-       MX6_PAD_NAND_WP_B__QSPI2_A_DATA_0       | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_READY_B__QSPI2_A_DATA_1    | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_CE0_B__QSPI2_A_DATA_2      | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_CE1_B__QSPI2_A_DATA_3      | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_ALE__QSPI2_A_SS0_B         | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_CLE__QSPI2_A_SCLK          | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_DATA07__QSPI2_A_DQS        | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_DATA01__QSPI2_B_DATA_0     | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_DATA00__QSPI2_B_DATA_1     | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_WE_B__QSPI2_B_DATA_2       | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_RE_B__QSPI2_B_DATA_3       | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_DATA03__QSPI2_B_SS0_B      | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_DATA02__QSPI2_B_SCLK       | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-       MX6_PAD_NAND_DATA05__QSPI2_B_DQS        | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
-};
-
 int board_qspi_init(void)
 {
-       /* Set the iomux */
-       imx_iomux_v3_setup_multiple_pads(quadspi_pads,
-                                        ARRAY_SIZE(quadspi_pads));
-
        /* Set the clock */
        enable_qspi_clk(1);
 

diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index dcac6f4..4c235c1 100644 (file)
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -15,6 +15,7 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PART=y
 CONFIG_CMD_PCI=y
@@ -37,8 +38,14 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_FSL_QSPI=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
 CONFIG_PCI=y

diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index dc4181d..2a7eb22 100644 (file)
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -184,6 +184,10 @@
 #define FSL_QSPI_FLASH_SIZE            SZ_32M
 #endif
 #define FSL_QSPI_FLASH_NUM             2
+#define CONFIG_SF_DEFAULT_BUS          1
+#define CONFIG_SF_DEFAULT_CS           0
+#define CONFIG_SF_DEFAULT_SPEED        40000000
+#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #endif
 
 #ifndef CONFIG_SPL_BUILD