clk: socfpga: remove clk_ops enable/disable methods

The enable/disable clock ops are already defined in the standard clock
ops, so we don't need to assign them.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200512181647.5071-2-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/socfpga/clk-pll-a10.c b/drivers/clk/socfpga/clk-pll-a10.c
index 3816fc0..6d93951 100644 (file)
--- a/drivers/clk/socfpga/clk-pll-a10.c
+++ b/drivers/clk/socfpga/clk-pll-a10.c
@@ -102,8 +102,6 @@ static struct clk * __init __socfpga_pll_init(struct device_node *node,
        pll_clk->hw.hw.init = &init;
 
        pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA;
-       clk_pll_ops.enable = clk_gate_ops.enable;
-       clk_pll_ops.disable = clk_gate_ops.disable;
 
        clk = clk_register(NULL, &pll_clk->hw.hw);
        if (WARN_ON(IS_ERR(clk))) {

diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c
index bcd3f14..9faa80f 100644 (file)
--- a/drivers/clk/socfpga/clk-pll-s10.c
+++ b/drivers/clk/socfpga/clk-pll-s10.c
@@ -138,8 +138,6 @@ struct clk *s10_register_pll(const struct stratix10_pll_clock *clks,
        pll_clk->hw.hw.init = &init;
 
        pll_clk->hw.bit_idx = SOCFPGA_PLL_POWER;
-       clk_pll_ops.enable = clk_gate_ops.enable;
-       clk_pll_ops.disable = clk_gate_ops.disable;
 
        clk = clk_register(NULL, &pll_clk->hw.hw);
        if (WARN_ON(IS_ERR(clk))) {

diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c
index dc65cc0..a001641 100644 (file)
--- a/drivers/clk/socfpga/clk-pll.c
+++ b/drivers/clk/socfpga/clk-pll.c
@@ -105,8 +105,6 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node,
        pll_clk->hw.hw.init = &init;
 
        pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA;
-       clk_pll_ops.enable = clk_gate_ops.enable;
-       clk_pll_ops.disable = clk_gate_ops.disable;
 
        clk = clk_register(NULL, &pll_clk->hw.hw);
        if (WARN_ON(IS_ERR(clk))) {