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arm64: dts: imx8mn: Init rates and parents configs for clocks
author
Peng Fan
<peng.fan@nxp.com>
Fri, 10 Jan 2020 07:20:31 +0000
(07:20 +0000)
committer
Shawn Guo
<shawnguo@kernel.org>
Thu, 13 Feb 2020 03:25:25 +0000
(11:25 +0800)
Add the initial configuration for clocks that need default parent and rate
setting.
NoC sources from SYS PLL3, running at 600MHz. Audio AHB/IPG clks needs
to run at 400MHz for better performance.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mn.dtsi
patch
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diff --git
a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index
d23347a
..
c98a376
100644
(file)
--- a/
arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/
arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@
-380,6
+380,16
@@
<&clk_ext3>, <&clk_ext4>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4";
+ assigned-clocks = <&clk IMX8MN_CLK_NOC>,
+ <&clk IMX8MN_CLK_AUDIO_AHB>,
+ <&clk IMX8MN_CLK_IPG_AUDIO_ROOT>,
+ <&clk IMX8MN_SYS_PLL3>;
+ assigned-clock-parents = <&clk IMX8MN_SYS_PLL3_OUT>,
+ <&clk IMX8MN_SYS_PLL1_800M>;
+ assigned-clock-rates = <0>,
+ <400000000>,
+ <400000000>,
+ <600000000>;
};
src: reset-controller@30390000 {