[PORT FROM R2] mid_pmu: soc_s0ix_idle shouldn't try C6 when cpu offload bit not set
authorYanmin Zhang <yanmin.zhang@intel.com>
Fri, 4 Nov 2011 07:54:41 +0000 (15:54 +0800)
committerbuildbot <buildbot@intel.com>
Wed, 21 Dec 2011 14:41:09 +0000 (06:41 -0800)
BZ:12588

1) Sometimes, mfld_s0ix_enter prints error cpu offload bit not set. Later on,
soc_s0ix_idle shouldn't try C6. We demote it to C4.
2) mfld_s3_enter should call pmu_set_s0ix_complete when mfld_s0ix_enter fails.

Change-Id: Iec1f85f69a29d658463f0901d8c3b2b0a32bf5b5
Orig-Change-Id: I639cb30b02754fb9ab4f2915ef468778597c2a72
Signed-off-by: Yanmin Zhang <yanmin.zhang@intel.com>
Reviewed-on: http://android.intel.com:8080/29303
Reviewed-by: Martin, LoicX <loicx.martin@intel.com>
Reviewed-by: Mansoor, Illyas <illyas.mansoor@intel.com>
Tested-by: Martin, LoicX <loicx.martin@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>
arch/x86/platform/mfld/pmu.c
drivers/idle/intel_idle.c

index da1c913..8fb8ef4 100755 (executable)
@@ -2444,8 +2444,10 @@ static int mfld_s3_enter(void)
 {
        u32 temp = 0;
 
-       if (mfld_s0ix_enter(MID_S3_STATE) != MID_S3_STATE)
+       if (mfld_s0ix_enter(MID_S3_STATE) != MID_S3_STATE) {
+               pmu_set_s0ix_complete();
                return -EINVAL;
+       }
 
        __monitor((void *) &temp, 0, 0);
        smp_mb();
index 346b818..e4f2bc6 100644 (file)
@@ -400,8 +400,10 @@ static int soc_s0ix_idle(struct cpuidle_device *dev,
                if (atomic_add_return(1, &nr_cpus_in_c6) ==
                    num_online_cpus() && s0ix_state) {
                        s0ix_entered = mfld_s0ix_enter(s0ix_state);
-                       if (!s0ix_entered)
+                       if (!s0ix_entered) {
+                               eax = C4_HINT;
                                pmu_set_s0ix_complete();
+                       }
                }
 
                __monitor((void *)&current_thread_info()->flags, 0, 0);
@@ -433,7 +435,9 @@ static int soc_s0ix_idle(struct cpuidle_device *dev,
                        dev->last_state = &dev->states[S0I1_STATE_IDX];
                else if (s0ix_state == MID_LPMP3_STATE)
                        dev->last_state = &dev->states[LPMP3_STATE_IDX];
-       } else
+       } else if (eax == C4_HINT)
+               dev->last_state = &dev->states[C4_STATE_IDX];
+       else
                dev->last_state = &dev->states[C6_STATE_IDX];
 
        return usec_delta;