drm/i915: check gem bo size when creating framebuffers
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 9 Oct 2013 19:55:33 +0000 (21:55 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 18 Oct 2013 13:05:07 +0000 (15:05 +0200)
It's better to catch such fallout early, and this way we can rely on
the checking done by the drm core on fb->heigh/width at modeset time.

If we ever support planar formats on intel we might want to look into
a common helper to do all this, but for now this is good enough.

v2: Take tiling into account, requested by Ville.

v3: Fix tile height on gen2, spotted by Ville.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Requested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c

index 97ee553..94b39be 100644 (file)
@@ -9991,6 +9991,7 @@ int intel_framebuffer_init(struct drm_device *dev,
                           struct drm_mode_fb_cmd2 *mode_cmd,
                           struct drm_i915_gem_object *obj)
 {
+       int aligned_height, tile_height;
        int pitch_limit;
        int ret;
 
@@ -10084,6 +10085,13 @@ int intel_framebuffer_init(struct drm_device *dev,
        if (mode_cmd->offsets[0] != 0)
                return -EINVAL;
 
+       tile_height = IS_GEN2(dev) ? 16 : 8;
+       aligned_height = ALIGN(mode_cmd->height,
+                              obj->tiling_mode ? tile_height : 1);
+       /* FIXME drm helper for size checks (especially planar formats)? */
+       if (obj->base.size < aligned_height * mode_cmd->pitches[0])
+               return -EINVAL;
+
        drm_helper_mode_fill_fb_struct(&intel_fb->base, mode_cmd);
        intel_fb->obj = obj;
        intel_fb->obj->framebuffer_references++;