spi: aspeed: Fix typo in mode_bits field for AST2600 platform
authorChin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Wed, 5 Oct 2022 08:32:09 +0000 (16:32 +0800)
committerMark Brown <broonie@kernel.org>
Mon, 10 Oct 2022 12:01:21 +0000 (13:01 +0100)
Both quad SPI TX and RX modes can be supported on AST2600.
Correct typo in mode_bits field in both ast2600_fmc_data
and ast2600_spi_data structs.

Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20221005083209.222272-1-chin-ting_kuo@aspeedtech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-aspeed-smc.c

index a334e89..33cefcf 100644 (file)
@@ -1163,7 +1163,7 @@ static const struct aspeed_spi_data ast2500_spi_data = {
 static const struct aspeed_spi_data ast2600_fmc_data = {
        .max_cs        = 3,
        .hastype       = false,
-       .mode_bits     = SPI_RX_QUAD | SPI_RX_QUAD,
+       .mode_bits     = SPI_RX_QUAD | SPI_TX_QUAD,
        .we0           = 16,
        .ctl0          = CE0_CTRL_REG,
        .timing        = CE0_TIMING_COMPENSATION_REG,
@@ -1178,7 +1178,7 @@ static const struct aspeed_spi_data ast2600_fmc_data = {
 static const struct aspeed_spi_data ast2600_spi_data = {
        .max_cs        = 2,
        .hastype       = false,
-       .mode_bits     = SPI_RX_QUAD | SPI_RX_QUAD,
+       .mode_bits     = SPI_RX_QUAD | SPI_TX_QUAD,
        .we0           = 16,
        .ctl0          = CE0_CTRL_REG,
        .timing        = CE0_TIMING_COMPENSATION_REG,