drm/amd/display: update cur_lane_setting to an array one for each lane

[why]
To support per lane lane setting adjustment, we need to change cur_lane_setting
to an array one for each lane as the first step.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index f3ada9b..814f67d 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -379,9 +379,9 @@ static ssize_t dp_phy_settings_read(struct file *f, char __user *buf,
                return -EINVAL;
 
        snprintf(rd_buf, rd_buf_size, "  %d  %d  %d\n",
-                       link->cur_lane_setting.VOLTAGE_SWING,
-                       link->cur_lane_setting.PRE_EMPHASIS,
-                       link->cur_lane_setting.POST_CURSOR2);
+                       link->cur_lane_setting[0].VOLTAGE_SWING,
+                       link->cur_lane_setting[0].PRE_EMPHASIS,
+                       link->cur_lane_setting[0].POST_CURSOR2);
 
        while (size) {
                if (*pos >= rd_buf_size)
@@ -733,7 +733,7 @@ static ssize_t dp_phy_test_pattern_debugfs_write(struct file *f, const char __us
        }
 
        for (i = 0; i < (unsigned int)(link_training_settings.link_settings.lane_count); i++)
-               link_training_settings.lane_settings[i] = link->cur_lane_setting;
+               link_training_settings.lane_settings[i] = link->cur_lane_setting[i];
 
        dc_link_set_test_pattern(
                link,

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 120c995..d24c00e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -676,8 +676,6 @@ static void dpcd_set_lt_pattern_and_lane_settings(
                                dpcd_base_lt_offset,
                                dpcd_lt_buffer,
                                size_in_bytes + sizeof(dpcd_pattern.raw));
-
-       link->cur_lane_setting = lt_settings->lane_settings[0];
 }
 
 bool dp_is_cr_done(enum dc_lane_count ln_count,
@@ -1145,7 +1143,6 @@ enum dc_status dpcd_set_lane_settings(
                        dpcd_lane[0].bits.MAX_SWING_REACHED,
                        dpcd_lane[0].bits.MAX_PRE_EMPHASIS_REACHED);
        }
-       link->cur_lane_setting = link_training_setting->lane_settings[0];
 
        return status;
 }

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index cc4b28e..368e834 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -372,6 +372,9 @@ void dp_set_hw_lane_settings(
 #else
        encoder->funcs->dp_set_lane_settings(encoder, link_settings);
 #endif
+       memmove(link->cur_lane_setting,
+                       link_settings->lane_settings,
+                       sizeof(link->cur_lane_setting));
 }
 
 void dp_set_hw_test_pattern(

diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h b/drivers/gpu/drm/amd/display/dc/dc_link.h
index 56340a1..a73d64b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -121,7 +121,7 @@ struct dc_link {
        struct dc_link_settings reported_link_cap;
        struct dc_link_settings verified_link_cap;
        struct dc_link_settings cur_link_settings;
-       struct dc_lane_settings cur_lane_setting;
+       struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
        struct dc_link_settings preferred_link_setting;
        struct dc_link_training_overrides preferred_training_settings;
        struct dp_audio_test_data audio_test_data;