drm/msm/dpu: remove always-true argument of dpu_core_irq_read()
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 17 Feb 2022 04:31:44 +0000 (07:31 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sun, 1 May 2022 23:07:07 +0000 (02:07 +0300)
The argument clear of the function dpu_core_irq_read() is always true.
Remove it.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/474697/
Link: https://lore.kernel.org/r/20220217043148.480898-3-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

index 7023ccb..6dce5d8 100644 (file)
@@ -33,13 +33,11 @@ irqreturn_t dpu_core_irq(struct msm_kms *kms);
  * dpu_core_irq_read - IRQ helper function for reading IRQ status
  * @dpu_kms:           DPU handle
  * @irq_idx:           irq index
- * @clear:             True to clear the irq after read
  * @return:            non-zero if irq detected; otherwise no irq detected
  */
 u32 dpu_core_irq_read(
                struct dpu_kms *dpu_kms,
-               int irq_idx,
-               bool clear);
+               int irq_idx);
 
 /**
  * dpu_core_irq_register_callback - For registering callback function on IRQ
index dcca7af..74e2518 100644 (file)
@@ -318,8 +318,7 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
                        wait_info);
 
        if (ret <= 0) {
-               irq_status = dpu_core_irq_read(phys_enc->dpu_kms,
-                               irq->irq_idx, true);
+               irq_status = dpu_core_irq_read(phys_enc->dpu_kms, irq->irq_idx);
                if (irq_status) {
                        unsigned long flags;
 
index a2f0500..2b4cad1 100644 (file)
@@ -363,7 +363,7 @@ static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms)
        wmb();
 }
 
-u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear)
+u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx)
 {
        struct dpu_hw_intr *intr = dpu_kms->hw_intr;
        int reg_idx;
@@ -390,7 +390,7 @@ u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear)
        intr_status = DPU_REG_READ(&intr->hw,
                        dpu_intr_set[reg_idx].status_off) &
                DPU_IRQ_MASK(irq_idx);
-       if (intr_status && clear)
+       if (intr_status)
                DPU_REG_WRITE(&intr->hw, dpu_intr_set[reg_idx].clr_off,
                                intr_status);