- Fix typo for enum HECI_WRITE.
- Fix timeout issue. If the time period is greater or equal 15s, it's timeout.
- Add 10ms wait time after disconnect, to ensure that hardware is ready.
Otherwise in the next time connection, hardware resource may be busy.
Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
if (dev->host_buffer_is_empty) {
dev->host_buffer_is_empty = 0;
if (heci_disconnect(dev, file_ext)) {
+ mdelay(10); /* Wait for hardware disconnection ready */
list_add_tail(&priv_cb->cb_list,
&dev->ctrl_rd_list.heci_cb.cb_list);
} else {
if (file_ext == &dev->iamthif_file_ext) {
priv_write_cb = find_pthi_read_list_entry(dev, file);
if ((priv_write_cb != NULL) &&
- (((currtime - priv_write_cb->read_time) >
+ (((currtime - priv_write_cb->read_time) >=
IAMTHIF_READ_TIMER) ||
(file_ext->reading_state == HECI_READ_COMPLETE))) {
(*offset) = 0;
list_del(&priv_cb_pos->cb_list);
if ((HECI_WRITING == file_ext->writing_state) &&
(priv_cb_pos->major_file_operations ==
- HECI_WRITING) &&
+ HECI_WRITE) &&
(file_ext != &dev->iamthif_file_ext)) {
DBG("HECI WRITE COMPLETE\n");
file_ext->writing_state =