dts: tvafe: update cutwindow for tl1 [1/1]
authorEvoke Zhang <evoke.zhang@amlogic.com>
Mon, 3 Jun 2019 03:28:28 +0000 (11:28 +0800)
committerTao Zeng <tao.zeng@amlogic.com>
Mon, 26 Aug 2019 08:14:50 +0000 (01:14 -0700)
PD#SWPL-8866

Problem:
atv line freq adjust is not qualified

Solution:
update cutwindow

Verify:
x301

Change-Id: Iaeaa2fbf27db22ad17ef2700e70f7af424a2539a
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
arch/arm/boot/dts/amlogic/tm2_t962e2_ab311.dts
arch/arm/boot/dts/amlogic/tm2_t962x3_ab301.dts
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311.dts
arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts

index 6b8bf3b..c2d23d3 100644 (file)
                clocks = <&clkc CLKID_DAC_CLK>;
                clock-names = "vdac_clk_gate";
 
-               cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
-               cutwindow_val_v = <4  8 14 16 24>;  /* level 0~4 */
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
                /* auto_adj_en:
                 * bit0 -- auto cdto
                 * bit1 -- auto hs
index 0f19f59..21db453 100644 (file)
                clocks = <&clkc CLKID_DAC_CLK>;
                clock-names = "vdac_clk_gate";
 
-               cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
-               cutwindow_val_v = <4  8 14 16 24>;  /* level 0~4 */
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
                /* auto_adj_en:
                 * bit0 -- auto cdto
                 * bit1 -- auto hs
index 1ab9d7c..a5594d9 100644 (file)
                clocks = <&clkc CLKID_DAC_CLK>;
                clock-names = "vdac_clk_gate";
 
-               cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
-               cutwindow_val_v = <4  8 14 16 24>;  /* level 0~4 */
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
        };
 
        vbi {
index 9dbe16a..4e049f4 100644 (file)
                clocks = <&clkc CLKID_DAC_CLK>;
                clock-names = "vdac_clk_gate";
 
-               cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
-               cutwindow_val_v = <4  8 14 16 24>;  /* level 0~4 */
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
        };
 
        vbi {
index 10f449b..690ee8b 100644 (file)
                clocks = <&clkc CLKID_DAC_CLK>;
                clock-names = "vdac_clk_gate";
 
-               cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
-               cutwindow_val_v = <4  8 14 16 24>;  /* level 0~4 */
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
                /* auto_adj_en:
                 * bit0 -- auto cdto
                 * bit1 -- auto hs
index 347ab37..7c717e5 100644 (file)
                clocks = <&clkc CLKID_DAC_CLK>;
                clock-names = "vdac_clk_gate";
 
-               cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
-               cutwindow_val_v = <4  8 14 16 24>;  /* level 0~4 */
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
                /* auto_adj_en:
                 * bit0 -- auto cdto
                 * bit1 -- auto hs
index f4a4b1e..c61acf5 100644 (file)
                clocks = <&clkc CLKID_DAC_CLK>;
                clock-names = "vdac_clk_gate";
 
-               cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
-               cutwindow_val_v = <4  8 14 16 24>;  /* level 0~4 */
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
        };
 
        vbi {
index fedae69..65f63f9 100644 (file)
                clocks = <&clkc CLKID_DAC_CLK>;
                clock-names = "vdac_clk_gate";
 
-               cutwindow_val_h = <0 10 18 20 62>; /* level 0~4 */
-               cutwindow_val_v = <4  8 14 16 24>;  /* level 0~4 */
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
        };
 
        vbi {