aliases {
serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
};
memory@00000000 {
};
};
+ uart_A: serial@ffd24000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd24000 0x0 0x18>;
+ interrupts = <0 26 1>;
+ status = "disable";
+ clocks = <&xtal
+ &clkc CLKID_UART0>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 128 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins>;
+ };
+
+ uart_B: serial@ffd23000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd23000 0x0 0x18>;
+ interrupts = <0 75 1>;
+ status = "disable";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&b_uart_pins>;
+ };
+
+ uart_C: serial@ffd22000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd22000 0x0 0x18>;
+ interrupts = <0 93 1>;
+ status = "disable";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins>;
+ };
+
canvas{
compatible = "amlogic, meson, canvas";
dev_name = "amlogic-canvas";
status = "okay";
clocks = <&xtal>;
clock-names = "clk_uart";
- xtal_tick_en = <1>;
+ xtal_tick_en = <2>;
fifosize = < 64 >;
pinctrl-names = "default";
pinctrl-0 = <&ao_uart_pins>;
support-sysrq = <0>; /* 0 not support , 1 support */
};
+
+ uart_AO_B: serial@4000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0x4000 0x0 0x18>;
+ interrupts = <0 197 1>;
+ status = "disable";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_b_uart_pins>;
+ };
};
#define AML_UART_BAUD_USE BIT(23)
#define AML_UART_BAUD_XTAL BIT(24)
#define AML_UART_BAUD_XTAL_TICK BIT(26)
+#define AML_UART_BAUD_XTAL_DIV2 BIT(27)
+
#define AML_UART_PORT_MAX 16
#define AML_UART_DEV_NAME "ttyS"
dev_info(&pdev->dev, "ttyS%d use xtal(24M) %d change %ld to %ld\n",
port->line, port->uartclk,
mup->baud, baud);
- val = (port->uartclk + baud / 2) / baud - 1;
- val |= (AML_UART_BAUD_USE|AML_UART_BAUD_XTAL
- |AML_UART_BAUD_XTAL_TICK);
+ if (xtal_tick_en == 1) {
+ val = (port->uartclk + baud / 2) / baud - 1;
+ val |= (AML_UART_BAUD_USE|AML_UART_BAUD_XTAL
+ |AML_UART_BAUD_XTAL_TICK);
+ } else if (xtal_tick_en == 2) {
+ val = (port->uartclk/2 + baud / 2) / baud - 1;
+ val |= (AML_UART_BAUD_USE|AML_UART_BAUD_XTAL
+ |AML_UART_BAUD_XTAL_DIV2);
+ }
} else {
dev_info(&pdev->dev, "ttyS%d use xtal(8M) %d change %ld to %ld\n",
port->line, port->uartclk,
if (!xtal_tick_en) {
prop = of_get_property(pdev->dev.of_node, "xtal_tick_en", NULL);
- if (prop)
+ if (prop) {
xtal_tick_en = of_read_ulong(prop, 1);
+ if (xtal_tick_en == 1)
+ xtal_tick_en = 0;
+ }
}
- xtal_tick_en = 0;
port->iotype = UPIO_MEM;
port->mapbase = res_mem->start;