Add Xtensa MCTargetDesc stub. Add XtensaTargetMachine and XtensaTargetInfo.
Modify llib/Target/LLVMBuild.txt. Now Xtensa target could be builded as EXPERIMENTAL.
Differential Revision: https://reviews.llvm.org/D64829
--- /dev/null
+add_llvm_component_group(Xtensa)
+
+add_llvm_target(XtensaCodeGen
+ XtensaTargetMachine.cpp
+
+ LINK_COMPONENTS
+ CodeGen
+ Core
+ Support
+ Target
+ XtensaInfo
+
+ ADD_TO_COMPONENT
+ Xtensa
+ )
+
+add_subdirectory(MCTargetDesc)
+add_subdirectory(TargetInfo)
--- /dev/null
+add_llvm_component_library(LLVMXtensaDesc
+ XtensaMCTargetDesc.cpp
+
+ LINK_COMPONENTS
+ MC
+ Support
+ XtensaInfo
+
+ ADD_TO_COMPONENT
+ Xtensa
+ )
--- /dev/null
+//===-- XtensaMCTargetDesc.cpp - Xtensa target descriptions ---------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+#include "XtensaMCTargetDesc.h"
+
+// We need to define this function for linking succeed
+extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaTargetMC() {}
--- /dev/null
+//===-- XtensaMCTargetDesc.h - Xtensa Target Descriptions -------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file provides Xtensa specific target descriptions.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H
+#define LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H
+
+#endif // LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H
--- /dev/null
+add_llvm_component_library(LLVMXtensaInfo
+ XtensaTargetInfo.cpp
+
+ LINK_COMPONENTS
+ MC
+ Support
+
+ ADD_TO_COMPONENT
+ Xtensa
+ )
--- /dev/null
+//===-- XtensaTargetInfo.cpp - Xtensa Target Implementation ---------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "TargetInfo/XtensaTargetInfo.h"
+#include "llvm/MC/TargetRegistry.h"
+using namespace llvm;
+
+Target &llvm::getTheXtensaTarget() {
+ static Target TheXtensaTarget;
+ return TheXtensaTarget;
+}
+
+extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaTargetInfo() {
+ RegisterTarget<Triple::xtensa> X(getTheXtensaTarget(), "xtensa", "Xtensa 32",
+ "XTENSA");
+}
--- /dev/null
+//===-- XtensaTargetInfo.h - Xtensa Target Implementation -*- C++ -------*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_XTENSA_TARGETINFO_XTENSATARGETINFO_H
+#define LLVM_LIB_TARGET_XTENSA_TARGETINFO_XTENSATARGETINFO_H
+
+namespace llvm {
+
+class Target;
+
+Target &getTheXtensaTarget();
+
+} // end namespace llvm
+
+#endif // LLVM_LIB_TARGET_XTENSA_TARGETINFO_XTENSATARGETINFO_H
--- /dev/null
+//===- XtensaTargetMachine.cpp - Define TargetMachine for Xtensa ----------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// Implements the info about Xtensa target spec.
+//
+//===----------------------------------------------------------------------===//
+
+#include "XtensaTargetMachine.h"
+#include "TargetInfo/XtensaTargetInfo.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
+#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/IR/LegacyPassManager.h"
+#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Transforms/IPO/PassManagerBuilder.h"
+#include "llvm/Transforms/Scalar.h"
+#include <optional>
+
+using namespace llvm;
+
+extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaTarget() {
+ // Register the target.
+ RegisterTargetMachine<XtensaTargetMachine> A(getTheXtensaTarget());
+}
+
+static std::string computeDataLayout(const Triple &TT, StringRef CPU,
+ const TargetOptions &Options,
+ bool IsLittle) {
+ std::string Ret = "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32";
+ return Ret;
+}
+
+static Reloc::Model getEffectiveRelocModel(bool JIT,
+ std::optional<Reloc::Model> RM) {
+ if (!RM || JIT)
+ return Reloc::Static;
+ return *RM;
+}
+
+XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT,
+ StringRef CPU, StringRef FS,
+ const TargetOptions &Options,
+ std::optional<Reloc::Model> RM,
+ std::optional<CodeModel::Model> CM,
+ CodeGenOpt::Level OL, bool JIT,
+ bool IsLittle)
+ : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, IsLittle), TT,
+ CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
+ getEffectiveCodeModel(CM, CodeModel::Small), OL),
+ TLOF(std::make_unique<TargetLoweringObjectFileELF>()) {
+ initAsmInfo();
+}
+
+XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT,
+ StringRef CPU, StringRef FS,
+ const TargetOptions &Options,
+ std::optional<Reloc::Model> RM,
+ std::optional<CodeModel::Model> CM,
+ CodeGenOpt::Level OL, bool JIT)
+ : XtensaTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}
+
+TargetPassConfig *XtensaTargetMachine::createPassConfig(PassManagerBase &PM) {
+ return new TargetPassConfig(*this, PM);
+}
--- /dev/null
+//===-- XtensaTargetMachine.h - Define TargetMachine for Xtensa -*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares the Xtensa specific subclass of TargetMachine.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H
+#define LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H
+
+#include "llvm/Target/TargetMachine.h"
+#include <optional>
+
+namespace llvm {
+extern Target TheXtensaTarget;
+
+class XtensaTargetMachine : public LLVMTargetMachine {
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;
+public:
+ XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
+ StringRef FS, const TargetOptions &Options,
+ std::optional<Reloc::Model> RM,
+ std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
+ bool JIT, bool isLittle);
+
+ XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
+ StringRef FS, const TargetOptions &Options,
+ std::optional<Reloc::Model> RM,
+ std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
+ bool JIT);
+
+ TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
+ TargetLoweringObjectFile *getObjFileLowering() const override {
+ return TLOF.get();
+ }
+};
+} // end namespace llvm
+
+#endif // LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H