* Description: Driver for the SMC Infrared Communications Controller
* Status: Experimental.
* Author: Daniele Peri (peri@csai.unipa.it)
- * Created at:
- * Modified at:
- * Modified by:
- *
+ * Created at:
+ * Modified at:
+ * Modified by:
+ *
* Copyright (c) 2002 Daniele Peri
* All Rights Reserved.
* Copyright (c) 2002 Jean Tourrilhes
*
* Copyright (c) 2001 Stefani Seibold
* Copyright (c) 1999-2001 Dag Brattli
- * Copyright (c) 1998-1999 Thomas Davis,
+ * Copyright (c) 1998-1999 Thomas Davis,
*
* and irport.c:
*
* Copyright (c) 1997, 1998, 1999-2000 Dag Brattli, All Rights Reserved.
*
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
- *
+ *
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
********************************************************************/
struct smsc_transceiver {
char *name;
- void (*set_for_speed)(int fir_base, u32 speed);
+ void (*set_for_speed)(int fir_base, u32 speed);
int (*probe)(int fir_base);
};
typedef struct smsc_transceiver smsc_transceiver_t;
struct net_device *netdev; /* Yes! we are some kind of netdevice */
struct net_device_stats stats;
struct irlap_cb *irlap; /* The link layer we are binded to */
-
+
chipio_t io; /* IrDA controller information */
iobuff_t tx_buff; /* Transmit buffer */
iobuff_t rx_buff; /* Receive buffer */
struct qos_info qos; /* QoS capabilities for this device */
spinlock_t lock; /* For serializing operations */
-
+
__u32 new_speed;
__u32 flags; /* Interface flags */
static void smsc_ircc_setup_qos(struct smsc_ircc_cb *self);
static void smsc_ircc_init_chip(struct smsc_ircc_cb *self);
static int __exit smsc_ircc_close(struct smsc_ircc_cb *self);
-static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase);
+static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase);
static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase);
static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self);
static int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
IRDA_DEBUG(1, "%s\n", __FUNCTION__);
dev_count=0;
-
+
if ((ircc_fir>0)&&(ircc_sir>0)) {
IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir);
IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir);
if (!smsc_superio_lpc(ircc_cfg))
ret = 0;
}
-
+
if(smsc_ircc_look_for_chips()>0) ret = 0;
-
+
return ret;
}
struct smsc_ircc_cb *self;
struct net_device *dev;
int err;
-
+
IRDA_DEBUG(1, "%s\n", __FUNCTION__);
err = smsc_ircc_present(fir_base, sir_base);
- if(err)
+ if(err)
goto err_out;
-
+
err = -ENOMEM;
if (dev_count > DIM(dev_self)) {
IRDA_WARNING("%s(), too many devices!\n", __FUNCTION__);
dev->stop = smsc_ircc_net_close;
dev->do_ioctl = smsc_ircc_net_ioctl;
dev->get_stats = smsc_ircc_net_get_stats;
-
+
self = dev->priv;
self->netdev = dev;
dev_self[dev_count++] = self;
spin_lock_init(&self->lock);
- self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
+ self->rx_buff.truesize = SMSC_IRCC2_RX_BUFF_TRUESIZE;
self->tx_buff.truesize = SMSC_IRCC2_TX_BUFF_TRUESIZE;
self->rx_buff.head =
self->rx_buff.state = OUTSIDE_FRAME;
self->tx_buff.data = self->tx_buff.head;
self->rx_buff.data = self->rx_buff.head;
-
+
smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq);
smsc_ircc_setup_qos(self);
smsc_ircc_init_chip(self);
-
- if(ircc_transceiver > 0 &&
+
+ if(ircc_transceiver > 0 &&
ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS)
self->transceiver = ircc_transceiver;
else
dma = config & IRCC_INTERFACE_DMA_MASK;
irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4;
- if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
+ if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) {
IRDA_WARNING("%s(), addr 0x%04x - no device found!\n",
__FUNCTION__, fir_base);
goto out3;
* Setup I/O
*
*/
-static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
- unsigned int fir_base, unsigned int sir_base,
+static void smsc_ircc_setup_io(struct smsc_ircc_cb *self,
+ unsigned int fir_base, unsigned int sir_base,
u8 dma, u8 irq)
{
unsigned char config, chip_dma, chip_irq;
}
else
self->io.irq = chip_irq;
-
+
if (dma < 255) {
if (dma != chip_dma)
IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
{
/* Initialize QoS for this device */
irda_init_max_qos_capabilies(&self->qos);
-
+
self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
*/
static void smsc_ircc_init_chip(struct smsc_ircc_cb *self)
{
- int iobase, ir_mode, ctrl, fast;
-
+ int iobase, ir_mode, ctrl, fast;
+
IRDA_ASSERT( self != NULL, return; );
iobase = self->io.fir_base;
outb(0x00, iobase+IRCC_MASTER);
register_bank(iobase, 1);
- outb(((inb(iobase+IRCC_SCE_CFGA) & 0x87) | ir_mode),
+ outb(((inb(iobase+IRCC_SCE_CFGA) & 0x87) | ir_mode),
iobase+IRCC_SCE_CFGA);
#ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */
- outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
+ outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
iobase+IRCC_SCE_CFGB);
-#else
+#else
outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
iobase+IRCC_SCE_CFGB);
-#endif
+#endif
(void) inb(iobase+IRCC_FIFO_THRESHOLD);
outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase+IRCC_FIFO_THRESHOLD);
-
+
register_bank(iobase, 4);
outb((inb(iobase+IRCC_CONTROL) & 0x30) | ctrl, iobase+IRCC_CONTROL);
-
+
register_bank(iobase, 0);
outb(fast, iobase+IRCC_LCR_A);
smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
-
+
/* Power on device */
outb(0x00, iobase+IRCC_MASTER);
}
IRDA_ASSERT(self != NULL, return -1;);
IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
-
+
switch (cmd) {
case SIOCSBANDWIDTH: /* Set bandwidth */
if (!capable(CAP_NET_ADMIN))
default:
ret = -EOPNOTSUPP;
}
-
+
return ret;
}
static struct net_device_stats *smsc_ircc_net_get_stats(struct net_device *dev)
{
struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) dev->priv;
-
+
return &self->stats;
}
unsigned long flags;
self = (struct smsc_ircc_cb *) dev->priv;
-
+
IRDA_WARNING("%s: transmit timed out, changing speed to: %d\n",
dev->name, self->io.speed);
spin_lock_irqsave(&self->lock, flags);
IRDA_DEBUG(1, "%s\n", __FUNCTION__);
IRDA_ASSERT(dev != NULL, return 0;);
-
+
self = (struct smsc_ircc_cb *) dev->priv;
IRDA_ASSERT(self != NULL, return 0;);
iobase = self->io.sir_base;
netif_stop_queue(dev);
-
+
/* Make sure test of self->io.speed & speed change are atomic */
spin_lock_irqsave(&self->lock, flags);
self->tx_buff.data = self->tx_buff.head;
/* Copy skb to tx_buff while wrapping, stuffing and making CRC */
- self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
+ self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
self->tx_buff.truesize);
-
+
self->stats.tx_bytes += self->tx_buff.len;
/* Turn on transmit finished interrupt. Will fire immediately! */
- outb(UART_IER_THRI, iobase+UART_IER);
+ outb(UART_IER_THRI, iobase+UART_IER);
spin_unlock_irqrestore(&self->lock, flags);
dev_kfree_skb(skb);
-
+
return 0;
}
switch(speed) {
default:
- case 576000:
+ case 576000:
ir_mode = IRCC_CFGA_IRDA_HDLC;
ctrl = IRCC_CRC;
fast = 0;
register_bank(fir_base, 0);
outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast, fir_base+IRCC_LCR_A);
#endif
-
+
register_bank(fir_base, 1);
outb(((inb(fir_base+IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base+IRCC_SCE_CFGA);
-
+
register_bank(fir_base, 4);
outb((inb(fir_base+IRCC_CONTROL) & 0x30) | ctrl, fir_base+IRCC_CONTROL);
}
/* Reset everything */
/* Install FIR transmit handler */
- dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
+ dev->hard_start_xmit = smsc_ircc_hard_xmit_fir;
/* Clear FIFO */
outb(inb(fir_base+IRCC_LCR_A)|IRCC_LCR_A_FIFO_RESET, fir_base+IRCC_LCR_A);
register_bank(fir_base, 1);
- /* Select the TX/RX interface */
+ /* Select the TX/RX interface */
#ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */
- outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
+ outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
fir_base+IRCC_SCE_CFGB);
-#else
+#else
outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
fir_base+IRCC_SCE_CFGB);
-#endif
+#endif
(void) inb(fir_base+IRCC_FIFO_THRESHOLD);
/* Enable SCE interrupts */
int fir_base;
IRDA_DEBUG(1, "%s\n", __FUNCTION__);
-
+
IRDA_ASSERT(self != NULL, return;);
fir_base = self->io.fir_base;
register_bank(fir_base, 0);
- /*outb(IRCC_MASTER_RESET, fir_base+IRCC_MASTER);*/
+ /*outb(IRCC_MASTER_RESET, fir_base+IRCC_MASTER);*/
outb(inb(fir_base+IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base+IRCC_LCR_B);
}
struct net_device *dev;
int iobase;
int last_speed_was_sir;
-
+
IRDA_DEBUG(0, "%s() changing speed to: %d\n", __FUNCTION__, speed);
IRDA_ASSERT(self != NULL, return;);
speed= 1152000;
self->io.speed = speed;
last_speed_was_sir = 0;
- smsc_ircc_fir_start(self);
+ smsc_ircc_fir_start(self);
#endif
-
+
if(self->io.speed == 0)
smsc_ircc_sir_start(self);
if(self->io.speed != speed) smsc_ircc_set_transceiver_for_speed(self, speed);
self->io.speed = speed;
-
+
if(speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
if(!last_speed_was_sir) {
smsc_ircc_fir_stop(self);
smsc_ircc_sir_start(self);
}
- smsc_ircc_set_sir_speed(self, speed);
+ smsc_ircc_set_sir_speed(self, speed);
}
else {
if(last_speed_was_sir) {
- #if SMSC_IRCC2_C_SIR_STOP
+ #if SMSC_IRCC2_C_SIR_STOP
smsc_ircc_sir_stop(self);
#endif
smsc_ircc_fir_start(self);
#if 0
self->tx_buff.len = 10;
self->tx_buff.data = self->tx_buff.head;
-
+
smsc_ircc_dma_xmit(self, iobase, 4000);
#endif
/* Be ready for incoming frames */
smsc_ircc_dma_receive(self, iobase);
}
-
+
netif_wake_queue(dev);
}
void smsc_ircc_set_sir_speed(void *priv, __u32 speed)
{
struct smsc_ircc_cb *self = (struct smsc_ircc_cb *) priv;
- int iobase;
+ int iobase;
int fcr; /* FIFO control reg */
int lcr; /* Line control reg */
int divisor;
IRDA_ASSERT(self != NULL, return;);
iobase = self->io.sir_base;
-
+
/* Update accounting for new speed */
self->io.speed = speed;
/* Turn off interrupts */
- outb(0, iobase+UART_IER);
+ outb(0, iobase+UART_IER);
divisor = SMSC_IRCC2_MAX_SIR_SPEED/speed;
-
+
fcr = UART_FCR_ENABLE_FIFO;
- /*
+ /*
* Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
* almost 1,7 ms at 19200 bps. At speeds above that we can just forget
- * about this timeout since it will always be fast enough.
+ * about this timeout since it will always be fast enough.
*/
if (self->io.speed < 38400)
fcr |= UART_FCR_TRIGGER_1;
- else
+ else
fcr |= UART_FCR_TRIGGER_14;
-
+
/* IrDA ports use 8N1 */
lcr = UART_LCR_WLEN8;
-
+
outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */
outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */
outb(divisor >> 8, iobase+UART_DLM);
/* Note : you should make sure that speed changes
* are not going to corrupt any outgoing frame.
* Look at nsc-ircc for the gory details - Jean II */
- smsc_ircc_change_speed(self, speed);
+ smsc_ircc_change_speed(self, speed);
spin_unlock_irqrestore(&self->lock, flags);
dev_kfree_skb(skb);
return 0;
} else
self->new_speed = speed;
}
-
+
memcpy(self->tx_buff.head, skb->data, skb->len);
self->tx_buff.len = skb->len;
self->tx_buff.data = self->tx_buff.head;
-
- mtt = irda_get_mtt(skb);
+
+ mtt = irda_get_mtt(skb);
if (mtt) {
int bofs;
- /*
+ /*
* Compute how many BOFs (STA or PA's) we need to waste the
* min turn time given the speed of the link.
*/
outb(0x00, iobase+IRCC_LCR_B);
#endif
register_bank(iobase, 1);
- outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
+ outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
iobase+IRCC_SCE_CFGB);
self->io.direction = IO_XMIT;
outb(self->tx_buff.len & 0xff, iobase+IRCC_TX_SIZE_LO);
/*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/
-
+
/* Enable burst mode chip Tx DMA */
register_bank(iobase, 1);
outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
register_bank(iobase, 0);
outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase+IRCC_IER);
outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER);
-
+
/* Enable transmit */
outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase+IRCC_LCR_B);
}
/*
* Function smsc_ircc_dma_xmit_complete (self)
*
- * The transfer of a frame in finished. This function will only be called
+ * The transfer of a frame in finished. This function will only be called
* by the interrupt handler
*
*/
/* Check if it's time to change the speed */
if (self->new_speed) {
- smsc_ircc_change_speed(self, self->new_speed);
+ smsc_ircc_change_speed(self, self->new_speed);
self->new_speed = 0;
}
* if it starts to receive a frame.
*
*/
-static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase)
+static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase)
{
#if 0
/* Turn off chip DMA */
register_bank(iobase, 1);
- outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
+ outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
iobase+IRCC_SCE_CFGB);
#endif
-
+
/* Disable Tx */
register_bank(iobase, 0);
outb(0x00, iobase+IRCC_LCR_B);
/* Turn off chip DMA */
register_bank(iobase, 1);
- outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
+ outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
iobase+IRCC_SCE_CFGB);
self->io.direction = IO_RECV;
/* Enable burst mode chip Rx DMA */
register_bank(iobase, 1);
- outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
+ outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB);
/* Enable interrupt */
/* Enable receiver */
register_bank(iobase, 0);
- outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
+ outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
iobase+IRCC_LCR_B);
-
+
return 0;
}
{
struct sk_buff *skb;
int len, msgcnt, lsr;
-
+
register_bank(iobase, 0);
-
+
IRDA_DEBUG(3, "%s\n", __FUNCTION__);
#if 0
/* Disable Rx */
len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
- /* Look for errors
- */
+ /* Look for errors
+ */
if(lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) {
self->stats.rx_errors++;
IRDA_WARNING("%s(), memory squeeze, dropping frame.\n",
__FUNCTION__);
return;
- }
+ }
/* Make sure IP header gets aligned */
- skb_reserve(skb, 1);
+ skb_reserve(skb, 1);
memcpy(skb_put(skb, len), self->rx_buff.data, len);
self->stats.rx_packets++;
* Receive one frame from the infrared port
*
*/
-static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
+static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self)
{
int boguscount = 0;
int iobase;
iobase = self->io.sir_base;
- /*
- * Receive all characters in Rx FIFO, unwrap and unstuff them.
- * async_unwrap_char will deliver all found frames
+ /*
+ * Receive all characters in Rx FIFO, unwrap and unstuff them.
+ * async_unwrap_char will deliver all found frames
*/
do {
- async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
+ async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
inb(iobase+UART_RX));
/* Make sure we don't stay here to long */
IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__);
break;
}
- } while (inb(iobase+UART_LSR) & UART_LSR_DR);
+ } while (inb(iobase+UART_LSR) & UART_LSR_DR);
}
irqreturn_t ret = IRQ_NONE;
if (dev == NULL) {
- printk(KERN_WARNING "%s: irq %d for unknown device.\n",
+ printk(KERN_WARNING "%s: irq %d for unknown device.\n",
driver_name, irq);
goto irq_ret;
}
IRDA_ASSERT(self != NULL, return IRQ_NONE;);
/* Serialise the interrupt handler in various CPUs, stop Tx path */
- spin_lock(&self->lock);
+ spin_lock(&self->lock);
/* Check if we should use the SIR interrupt handler */
if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) {
register_bank(iobase, 0);
iir = inb(iobase+IRCC_IIR);
- if (iir == 0)
+ if (iir == 0)
goto irq_ret_unlock;
ret = IRQ_HANDLED;
outb(0, iobase+IRCC_IER);
lcra = inb(iobase+IRCC_LCR_A);
lsr = inb(iobase+IRCC_LSR);
-
+
IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir);
if (iir & IRCC_IIR_EOM) {
smsc_ircc_dma_receive_complete(self, iobase);
else
smsc_ircc_dma_xmit_complete(self, iobase);
-
+
smsc_ircc_dma_receive(self, iobase);
}
/* Clear interrupt */
lsr = inb(iobase+UART_LSR);
- IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
+ IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
__FUNCTION__, iir, lsr, iobase);
switch (iir) {
IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n",
__FUNCTION__, iir);
break;
- }
-
+ }
+
/* Make sure we don't stay here to long */
if (boguscount++ > 100)
break;
- iir = inb(iobase + UART_IIR) & UART_IIR_ID;
+ iir = inb(iobase + UART_IIR) & UART_IIR_ID;
}
/*spin_unlock(&self->lock);*/
return IRQ_HANDLED;
get_dma_residue(self->io.dma));
status = (self->rx_buff.state != OUTSIDE_FRAME);
-
+
return status;
}
#endif /* unused */
unsigned long flags;
IRDA_DEBUG(1, "%s\n", __FUNCTION__);
-
+
IRDA_ASSERT(dev != NULL, return -1;);
self = (struct smsc_ircc_cb *) dev->priv;
IRDA_ASSERT(self != NULL, return 0;);
-
+
iobase = self->io.fir_base;
- if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
+ if (request_irq(self->io.irq, smsc_ircc_interrupt, 0, dev->name,
(void *) dev)) {
IRDA_DEBUG(0, "%s(), unable to allocate irq=%d\n",
__FUNCTION__, self->io.irq);
self->io.speed = 0;
smsc_ircc_change_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED);
spin_unlock_irqrestore(&self->lock, flags);
-
+
/* Give self a hardware name */
/* It would be cool to offer the chip revision here - Jean II */
sprintf(hwname, "SMSC @ 0x%03x", self->io.fir_base);
- /*
+ /*
* Open new IrLAP layer instance, now that everything should be
- * initialized properly
+ * initialized properly
*/
self->irlap = irlap_open(dev, &self->qos, hwname);
__FUNCTION__, self->io.dma);
return -EAGAIN;
}
-
+
netif_start_queue(dev);
return 0;
int iobase;
IRDA_DEBUG(1, "%s\n", __FUNCTION__);
-
+
IRDA_ASSERT(dev != NULL, return -1;);
- self = (struct smsc_ircc_cb *) dev->priv;
+ self = (struct smsc_ircc_cb *) dev->priv;
IRDA_ASSERT(self != NULL, return 0;);
-
+
iobase = self->io.fir_base;
/* Stop device */
netif_stop_queue(dev);
-
+
/* Stop and remove instance of IrLAP */
if (self->irlap)
irlap_close(self->irlap);
* or give a good reason. - Jean II */
smsc_ircc_net_open(self->netdev);
-
+
IRDA_MESSAGE("%s, Waking up\n", driver_name);
}
release_region(self->io.fir_base, self->io.fir_ext);
- IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
+ IRDA_DEBUG(0, "%s(), releasing 0x%03x\n", __FUNCTION__,
self->io.sir_base);
release_region(self->io.sir_base, self->io.sir_ext);
if (self->tx_buff.head)
dma_free_coherent(NULL, self->tx_buff.truesize,
self->tx_buff.head, self->tx_buff_dma);
-
+
if (self->rx_buff.head)
dma_free_coherent(NULL, self->rx_buff.truesize,
self->rx_buff.head, self->rx_buff_dma);
IRDA_DEBUG(3, "%s\n", __FUNCTION__);
- IRDA_ASSERT(self != NULL, return;);
+ IRDA_ASSERT(self != NULL, return;);
dev= self->netdev;
- IRDA_ASSERT(dev != NULL, return;);
+ IRDA_ASSERT(dev != NULL, return;);
dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir;
fir_base = self->io.fir_base;
/* Initialize UART */
outb(UART_LCR_WLEN8, sir_base+UART_LCR); /* Reset DLAB */
outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base+UART_MCR);
-
+
/* Turn on interrups */
outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base+UART_IER);
/* Reset UART */
outb(0, iobase+UART_MCR);
-
+
/* Turn off interrupts */
outb(0, iobase+UART_IER);
}
/* Finished with frame? */
if (self->tx_buff.len > 0) {
/* Write data left in transmit buffer */
- actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
+ actual = smsc_ircc_sir_write(iobase, self->io.fifo_size,
self->tx_buff.data, self->tx_buff.len);
self->tx_buff.data += actual;
self->tx_buff.len -= actual;
} else {
-
+
/*if (self->tx_buff.len ==0) {*/
-
- /*
- * Now serial buffer is almost free & we can start
+
+ /*
+ * Now serial buffer is almost free & we can start
* transmission of another packet. But first we must check
* if we need to change the speed of the hardware
*/
self->stats.tx_packets++;
if(self->io.speed <= 115200) {
- /*
+ /*
* Reset Rx FIFO to make sure that all reflected transmit data
* is discarded. This is needed for half duplex operation
*/
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR;
if (self->io.speed < 38400)
fcr |= UART_FCR_TRIGGER_1;
- else
+ else
fcr |= UART_FCR_TRIGGER_14;
outb(fcr, iobase+UART_FCR);
static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
{
int actual = 0;
-
+
/* Tx FIFO should be empty! */
if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) {
IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__);
return 0;
}
-
+
/* Fill FIFO with current frame */
while ((fifo_size-- > 0) && (actual < len)) {
/* Transmit next byte */
static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self)
{
unsigned int i;
-
+
IRDA_ASSERT(self != NULL, return;);
-
- for(i=0; smsc_transceivers[i].name!=NULL; i++)
+
+ for(i=0; smsc_transceivers[i].name!=NULL; i++)
if((*smsc_transceivers[i].probe)(self->io.fir_base)) {
IRDA_MESSAGE(" %s transceiver found\n",
smsc_transceivers[i].name);
}
IRDA_MESSAGE("No transceiver found. Defaulting to %s\n",
smsc_transceivers[SMSC_IRCC2_C_DEFAULT_TRANSCEIVER].name);
-
+
self->transceiver= SMSC_IRCC2_C_DEFAULT_TRANSCEIVER;
}
static void smsc_ircc_set_transceiver_for_speed(struct smsc_ircc_cb *self, u32 speed)
{
unsigned int trx;
-
+
trx = self->transceiver;
if(trx>0) (*smsc_transceivers[trx-1].set_for_speed)(self->io.fir_base, speed);
}
{
int iobase;
int count = SMSC_IRCC2_HW_TRANSMITTER_TIMEOUT_US;
-
+
iobase = self->io.sir_base;
-
+
/* Calibrated busy loop */
while((count-- > 0) && !(inb(iobase+UART_LSR) & UART_LSR_TEMT))
udelay(1);
smsc_chip_address_t *address;
char *type;
unsigned int cfg_base, found;
-
+
found = 0;
address = possible_addresses;
-
+
while(address->cfg_base){
cfg_base = address->cfg_base;
-
+
/*printk(KERN_WARNING "%s(): probing: 0x%02x for: 0x%02x\n", __FUNCTION__, cfg_base, address->type);*/
-
+
if( address->type & SMSCSIO_TYPE_FDC){
type = "FDC";
if((address->type) & SMSCSIO_TYPE_FLAT) {
if(!smsc_superio_flat(fdc_chips_flat,cfg_base, type)) found++;
}
if((address->type) & SMSCSIO_TYPE_PAGED) {
- if(!smsc_superio_paged(fdc_chips_paged,cfg_base, type)) found++;
- }
+ if(!smsc_superio_paged(fdc_chips_paged,cfg_base, type)) found++;
+ }
}
if( address->type & SMSCSIO_TYPE_LPC){
type = "LPC";
if(!smsc_superio_flat(lpc_chips_flat,cfg_base,type)) found++;
}
if((address->type) & SMSCSIO_TYPE_PAGED) {
- if(!smsc_superio_paged(lpc_chips_paged,cfg_base,"LPC")) found++;
- }
+ if(!smsc_superio_paged(lpc_chips_paged,cfg_base,"LPC")) found++;
+ }
}
address++;
}
return found;
-}
+}
/*
* Function smsc_superio_flat (chip, base, type)
outb(SMSCSIOFLAT_UARTMODE0C_REG, cfgbase);
mode = inb(cfgbase+1);
-
+
/*printk(KERN_WARNING "%s(): mode: 0x%02x\n", __FUNCTION__, mode);*/
-
+
if(!(mode & SMSCSIOFLAT_UART2MODE_VAL_IRDA))
IRDA_WARNING("%s(): IrDA not enabled\n", __FUNCTION__);
outb(SMSCSIOFLAT_UART2BASEADDR_REG, cfgbase);
sirbase = inb(cfgbase+1) << 2;
- /* FIR iobase */
+ /* FIR iobase */
outb(SMSCSIOFLAT_FIRBASEADDR_REG, cfgbase);
firbase = inb(cfgbase+1) << 3;
/* DMA */
outb(SMSCSIOFLAT_FIRDMASELECT_REG, cfgbase);
dma = inb(cfgbase+1) & SMSCSIOFLAT_FIRDMASELECT_MASK;
-
+
/* IRQ */
outb(SMSCSIOFLAT_UARTIRQSELECT_REG, cfgbase);
irq = inb(cfgbase+1) & SMSCSIOFLAT_UART2IRQSELECT_MASK;
if (firbase) {
if (smsc_ircc_open(firbase, sirbase, dma, irq) == 0)
- ret=0;
+ ret=0;
}
-
+
/* Exit configuration */
outb(SMSCSIO_CFGEXITKEY, cfgbase);
{
unsigned short fir_io, sir_io;
int ret = -ENODEV;
-
+
IRDA_DEBUG(1, "%s\n", __FUNCTION__);
if (smsc_ircc_probe(cfg_base,0x20,chips,type)==NULL)
return ret;
-
+
/* Select logical device (UART2) */
outb(0x07, cfg_base);
outb(0x05, cfg_base + 1);
-
+
/* SIR iobase */
outb(0x60, cfg_base);
sir_io = inb(cfg_base + 1) << 8;
outb(0x61, cfg_base);
sir_io |= inb(cfg_base + 1);
-
+
/* Read FIR base */
outb(0x62, cfg_base);
fir_io = inb(cfg_base + 1) << 8;
if (fir_io) {
if (smsc_ircc_open(fir_io, sir_io, ircc_dma, ircc_irq) == 0)
- ret=0;
+ ret=0;
}
-
+
/* Exit configuration */
outb(SMSCSIO_CFGEXITKEY, cfg_base);
static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg,const smsc_chip_t *chip,char *type)
{
- u8 devid,xdevid,rev;
+ u8 devid,xdevid,rev;
IRDA_DEBUG(1, "%s\n", __FUNCTION__);
if (smsc_access(cfg_base,0x55)) /* send second key and check */
return NULL;
#endif
-
+
/* probe device ID */
if (smsc_access(cfg_base,reg))
return NULL;
devid=inb(cfg_base+1);
-
+
if (devid==0) /* typical value for unused port */
return NULL;
if (rev>=128) /* i think this will make no sense */
return NULL;
- if (devid==xdevid) /* protection against false positives */
+ if (devid==xdevid) /* protection against false positives */
return NULL;
/* Check for expected device ID; are there others? */
IRDA_MESSAGE("found SMC SuperIO Chip (devid=0x%02x rev=%02X base=0x%04x): %s%s\n",devid,rev,cfg_base,type,chip->name);
if (chip->rev>rev){
- IRDA_MESSAGE("Revision higher than expected\n");
+ IRDA_MESSAGE("Revision higher than expected\n");
return NULL;
}
-
+
if (chip->flags&NoIRDA)
IRDA_MESSAGE("chipset does not support IRDA\n");
{
unsigned long jiffies_now, jiffies_timeout;
u8 val;
-
+
jiffies_now= jiffies;
jiffies_timeout= jiffies+SMSC_IRCC2_ATC_PROGRAMMING_TIMEOUT_JIFFIES;
-
+
/* ATC */
register_bank(fir_base, 4);
outb((inb(fir_base+IRCC_ATC) & IRCC_ATC_MASK) |IRCC_ATC_nPROGREADY|IRCC_ATC_ENABLE, fir_base+IRCC_ATC);
/*
* Function smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(self, speed)
*
- * Set transceiver
+ * Set transceiver
*
*/
static void smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select(int fir_base, u32 speed)
{
u8 fast_mode;
-
+
switch(speed)
{
default:
case 576000 :
- fast_mode = 0;
+ fast_mode = 0;
break;
case 1152000 :
case 4000000 :
fast_mode = IRCC_LCR_A_FAST;
break;
-
+
}
register_bank(fir_base, 0);
outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast_mode, fir_base+IRCC_LCR_A);
/*
* Function smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select(fir_base)
*
- * Probe transceiver
+ * Probe transceiver
*
*/
/*
* Function smsc_ircc_set_transceiver_toshiba_sat1800(fir_base, speed)
*
- * Set transceiver
+ * Set transceiver
*
*/
static void smsc_ircc_set_transceiver_toshiba_sat1800(int fir_base, u32 speed)
{
u8 fast_mode;
-
+
switch(speed)
{
default:
case 576000 :
- fast_mode = 0;
+ fast_mode = 0;
break;
case 1152000 :
case 4000000 :
fast_mode = /*IRCC_LCR_A_FAST |*/ IRCC_LCR_A_GP_DATA;
break;
-
+
}
/* This causes an interrupt */
register_bank(fir_base, 0);
/*
* Function smsc_ircc_probe_transceiver_toshiba_sat1800(fir_base)
*
- * Probe transceiver
+ * Probe transceiver
*
*/
projects / platform / kernel / linux-starfive.git / commitdiff