drm/i915/fbc: add comments to the FBC auxiliary structs

I wrote this code an year and a half ago and I couldn't exactly
remember the main differences of these two structures when reviewing a
new FBC patch. Add some comments to help explain what's the purpose of
each struct.

For the record, the original commits are:
 b183b3f14395 ("drm/i915/fbc: introduce struct intel_fbc_reg_params")
 aaf78d276ba0 ("drm/i915/fbc: introduce struct intel_fbc_state_cache")

Cc: Praveen Paneri <praveen.paneri@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20170714193822.12121-1-paulo.r.zanoni@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0376472..2c7456f 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1058,6 +1058,11 @@ struct intel_fbc {
        bool underrun_detected;
        struct work_struct underrun_work;
 
+       /*
+        * Due to the atomic rules we can't access some structures without the
+        * appropriate locking, so we cache information here in order to avoid
+        * these problems.
+        */
        struct intel_fbc_state_cache {
                struct i915_vma *vma;
 
@@ -1079,6 +1084,13 @@ struct intel_fbc {
                } fb;
        } state_cache;
 
+       /*
+        * This structure contains everything that's relevant to program the
+        * hardware registers. When we want to figure out if we need to disable
+        * and re-enable FBC for a new configuration we just check if there's
+        * something different in the struct. The genx_fbc_activate functions
+        * are supposed to read from it in order to program the registers.
+        */
        struct intel_fbc_reg_params {
                struct i915_vma *vma;