arm64: dts: renesas: r8a779g0: Add TMU nodes

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20221103205546.24836-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
index 8141ffc..fbab981 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
@@ -251,6 +251,71 @@
                        resets = <&cpg 611>;
                };
 
+               tmu0: timer@e61e0000 {
+                       compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
+                       reg = <0 0xe61e0000 0 0x30>;
+                       interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 713>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
+                       resets = <&cpg 713>;
+                       status = "disabled";
+               };
+
+               tmu1: timer@e6fc0000 {
+                       compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
+                       reg = <0 0xe6fc0000 0 0x30>;
+                       interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 714>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
+                       resets = <&cpg 714>;
+                       status = "disabled";
+               };
+
+               tmu2: timer@e6fd0000 {
+                       compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
+                       reg = <0 0xe6fd0000 0 0x30>;
+                       interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 715>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
+                       resets = <&cpg 715>;
+                       status = "disabled";
+               };
+
+               tmu3: timer@e6fe0000 {
+                       compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
+                       reg = <0 0xe6fe0000 0 0x30>;
+                       interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 716>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
+                       resets = <&cpg 716>;
+                       status = "disabled";
+               };
+
+               tmu4: timer@ffc00000 {
+                       compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
+                       reg = <0 0xffc00000 0 0x30>;
+                       interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 717>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
+                       resets = <&cpg 717>;
+                       status = "disabled";
+               };
+
                i2c0: i2c@e6500000 {
                        compatible = "renesas,i2c-r8a779g0",
                                     "renesas,rcar-gen4-i2c";