ge2d: enhanced hsc adv num
authorzhilei.wu <zhilei.wu@amlogic.com>
Thu, 7 Jun 2018 11:10:14 +0000 (19:10 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Fri, 29 Jun 2018 07:35:05 +0000 (00:35 -0700)
PD#165090: ge2d: enhanced hsc adv num

Change-Id: Ib4026d6883e70ddf38ab4d093fd37827b98f6c5e
Signed-off-by: zhilei.wu <zhilei.wu@amlogic.com>
drivers/amlogic/media/common/ge2d/bitblt.c
drivers/amlogic/media/common/ge2d/blend.c
drivers/amlogic/media/common/ge2d/fillrect.c
drivers/amlogic/media/common/ge2d/ge2d_hw.c
drivers/amlogic/media/common/ge2d/stretchblt.c
include/linux/amlogic/media/ge2d/ge2d.h

index 58655c5..0636353 100644 (file)
@@ -39,6 +39,7 @@ static void _bitblt(struct ge2d_context_s *wq,
        ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
        ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
        ge2d_cmd_cfg->hsc_div_en = 0;
+       ge2d_cmd_cfg->hsc_adv_num = 0;
 
        ge2d_cmd_cfg->color_blend_mode = OPERATION_LOGIC;
        ge2d_cmd_cfg->color_logic_op   = LOGIC_OPERATION_COPY;
@@ -75,6 +76,7 @@ static void _bitblt_noalpha(struct ge2d_context_s *wq,
        ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
        ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
        ge2d_cmd_cfg->hsc_div_en = 0;
+       ge2d_cmd_cfg->hsc_adv_num = 0;
 
        ge2d_cmd_cfg->color_blend_mode = OPERATION_LOGIC;
        ge2d_cmd_cfg->color_logic_op   = LOGIC_OPERATION_COPY;
index c75ac3a..0f3c384 100644 (file)
@@ -51,12 +51,19 @@ void blend(struct ge2d_context_s *wq,
                ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
                ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
                ge2d_cmd_cfg->hsc_div_en = 1;
+#ifdef CONFIG_GE2D_ADV_NUM
+               ge2d_cmd_cfg->hsc_adv_num =
+                       ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
+#else
+               ge2d_cmd_cfg->hsc_adv_num = 0;
+#endif
        } else {
                ge2d_cmd_cfg->sc_hsc_en = 0;
                ge2d_cmd_cfg->sc_vsc_en = 0;
                ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
                ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
                ge2d_cmd_cfg->hsc_div_en = 0;
+               ge2d_cmd_cfg->hsc_adv_num = 0;
        }
 
        ge2d_cmd_cfg->color_blend_mode = (op >> 24) & 0xff;
@@ -115,12 +122,19 @@ void blend_noblk(struct ge2d_context_s *wq,
                ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
                ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
                ge2d_cmd_cfg->hsc_div_en = 1;
+#ifdef CONFIG_GE2D_ADV_NUM
+               ge2d_cmd_cfg->hsc_adv_num =
+                       ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
+#else
+               ge2d_cmd_cfg->hsc_adv_num = 0;
+#endif
        } else {
                ge2d_cmd_cfg->sc_hsc_en = 0;
                ge2d_cmd_cfg->sc_vsc_en = 0;
                ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
                ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
                ge2d_cmd_cfg->hsc_div_en = 0;
+               ge2d_cmd_cfg->hsc_adv_num = 0;
        }
 
        ge2d_cmd_cfg->color_blend_mode = (op >> 24) & 0xff;
@@ -177,12 +191,19 @@ void blend_noalpha(struct ge2d_context_s *wq,
                ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
                ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
                ge2d_cmd_cfg->hsc_div_en = 1;
+#ifdef CONFIG_GE2D_ADV_NUM
+               ge2d_cmd_cfg->hsc_adv_num =
+                       ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
+#else
+               ge2d_cmd_cfg->hsc_adv_num = 0;
+#endif
        } else {
                ge2d_cmd_cfg->sc_hsc_en = 0;
                ge2d_cmd_cfg->sc_vsc_en = 0;
                ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
                ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
                ge2d_cmd_cfg->hsc_div_en = 0;
+               ge2d_cmd_cfg->hsc_adv_num = 0;
        }
 
        ge2d_cmd_cfg->color_blend_mode = (op >> 24) & 0xff;
@@ -238,12 +259,19 @@ void blend_noalpha_noblk(struct ge2d_context_s *wq,
                ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
                ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
                ge2d_cmd_cfg->hsc_div_en = 1;
+#ifdef CONFIG_GE2D_ADV_NUM
+               ge2d_cmd_cfg->hsc_adv_num =
+                       ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
+#else
+               ge2d_cmd_cfg->hsc_adv_num = 0;
+#endif
        } else {
                ge2d_cmd_cfg->sc_hsc_en = 0;
                ge2d_cmd_cfg->sc_vsc_en = 0;
                ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
                ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
                ge2d_cmd_cfg->hsc_div_en = 0;
+               ge2d_cmd_cfg->hsc_adv_num = 0;
        }
 
        ge2d_cmd_cfg->color_blend_mode = (op >> 24) & 0xff;
index c5b7782..00d5610 100644 (file)
@@ -45,6 +45,7 @@ static void _fillrect(struct ge2d_context_s *wq,
        ge2d_cmd_cfg->hsc_rpt_p0_num = 0;
        ge2d_cmd_cfg->vsc_rpt_l0_num = 0;
        ge2d_cmd_cfg->hsc_div_en = 0;
+       ge2d_cmd_cfg->hsc_adv_num = 0;
 
        ge2d_cmd_cfg->src1_fill_color_en = 1;
 
index 78e141e..85d5657 100644 (file)
@@ -894,7 +894,9 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
                cfg->hsc_div_length = (124 << 24) / cfg->hsc_phase_step;
 
                multo = cfg->hsc_phase_step * cfg->hsc_div_length;
+#ifndef CONFIG_GE2D_ADV_NUM
                cfg->hsc_adv_num   = multo >> 24;
+#endif
                cfg->hsc_adv_phase = multo & 0xffffff;
        }
 
@@ -961,20 +963,32 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
                            (cfg->sc_vsc_en << 1) |
                            (cfg->sc_hsc_en << 0)), 11, 18);
 
-       ge2d_reg_write(GE2D_HSC_ADV_CTRL,
-                       (cfg->hsc_adv_num << 24) |
-                       (cfg->hsc_adv_phase << 0)
-                      );
-
        ge2d_reg_write(GE2D_HSC_START_PHASE_STEP, cfg->hsc_phase_step);
 
        ge2d_reg_write(GE2D_HSC_PHASE_SLOPE, cfg->hsc_phase_slope);
 
+#ifdef CONFIG_GE2D_ADV_NUM
+       ge2d_reg_write(GE2D_HSC_ADV_CTRL,
+                       (cfg->hsc_adv_num << 24) |
+                       (cfg->hsc_adv_phase << 0)
+                      );
+       if (cfg->hsc_adv_num > 255)
+               cfg->hsc_adv_num = cfg->hsc_adv_num >> 8;
        ge2d_reg_write(GE2D_HSC_INI_CTRL,
                        (cfg->hsc_rpt_p0_num << 29) |
+                       (cfg->hsc_adv_num << 24) |
                        (cfg->hsc_ini_phase << 0)
                       );
-
+#else
+       ge2d_reg_write(GE2D_HSC_ADV_CTRL,
+                       (cfg->hsc_adv_num << 24) |
+                       (cfg->hsc_adv_phase << 0)
+                      );
+       ge2d_reg_write(GE2D_HSC_INI_CTRL,
+                       (cfg->hsc_rpt_p0_num << 29) |
+                       (cfg->hsc_ini_phase << 0)
+                      );
+#endif
 
        ge2d_reg_write(GE2D_VSC_START_PHASE_STEP, cfg->vsc_phase_step);
 
index ebef36b..0c04197 100644 (file)
@@ -40,7 +40,12 @@ static void _stretchblt(struct ge2d_context_s *wq,
        ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
        ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
        ge2d_cmd_cfg->hsc_div_en = 1;
-
+#ifdef CONFIG_GE2D_ADV_NUM
+       ge2d_cmd_cfg->hsc_adv_num =
+               ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
+#else
+       ge2d_cmd_cfg->hsc_adv_num = 0;
+#endif
        ge2d_cmd_cfg->color_blend_mode = OPERATION_LOGIC;
        ge2d_cmd_cfg->color_logic_op   = LOGIC_OPERATION_COPY;
        ge2d_cmd_cfg->alpha_blend_mode = OPERATION_LOGIC;
@@ -100,7 +105,12 @@ static void _stretchblt_noalpha(struct ge2d_context_s *wq,
        ge2d_cmd_cfg->hsc_rpt_p0_num = 1;
        ge2d_cmd_cfg->vsc_rpt_l0_num = 1;
        ge2d_cmd_cfg->hsc_div_en = 1;
-
+#ifdef CONFIG_GE2D_ADV_NUM
+       ge2d_cmd_cfg->hsc_adv_num =
+               ((dst_w - 1) < 1024) ? (dst_w - 1) : 0;
+#else
+       ge2d_cmd_cfg->hsc_adv_num = 0;
+#endif
        ge2d_cmd_cfg->color_blend_mode = OPERATION_LOGIC;
        ge2d_cmd_cfg->color_logic_op   = LOGIC_OPERATION_COPY;
        ge2d_cmd_cfg->alpha_blend_mode = OPERATION_LOGIC;
index 3d458ca..dbd935a 100644 (file)
@@ -31,6 +31,7 @@
 #define MAX_BITBLT_WORK_CONFIG 4
 #define MAX_GE2D_CMD  32   /* 64 */
 
+/* #define CONFIG_GE2D_ADV_NUM */
 #define CONFIG_GE2D_SRC2
 #define GE2D_STATE_IDLE                 0
 #define GE2D_STATE_RUNNING              1