arm64: dts: qcom: ipq9574: Use assigned-clock-rates for QUP I2C core clks
authorDevi Priya <quic_devipriy@quicinc.com>
Thu, 15 Jun 2023 08:48:41 +0000 (14:18 +0530)
committerBjorn Andersson <andersson@kernel.org>
Sat, 22 Jul 2023 04:25:19 +0000 (21:25 -0700)
Use assigned-clock-rates property for configuring the QUP I2C core clocks
to operate at nominal frequency.

Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20230615084841.12375-1-quic_devipriy@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/ipq9574.dtsi

index a212250..51aba07 100644 (file)
                        clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       assigned-clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+                       assigned-clock-rates = <50000000>;
                        dmas = <&blsp_dma 14>, <&blsp_dma 15>;
                        dma-names = "tx", "rx";
                        status = "disabled";
                        clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       assigned-clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
+                       assigned-clock-rates = <50000000>;
                        dmas = <&blsp_dma 16>, <&blsp_dma 17>;
                        dma-names = "tx", "rx";
                        status = "disabled";
                        clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       assigned-clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
+                       assigned-clock-rates = <50000000>;
                        dmas = <&blsp_dma 18>, <&blsp_dma 19>;
                        dma-names = "tx", "rx";
                        status = "disabled";
                        clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       assigned-clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
+                       assigned-clock-rates = <50000000>;
                        dmas = <&blsp_dma 20>, <&blsp_dma 21>;
                        dma-names = "tx", "rx";
                        status = "disabled";